Efficient use of spare gates for post-silicon debug and enhancements

An integrated circuit device, comprising:

• a pre-defined logic circuit formed on an integrated circuit chip;
• and
• a plurality of spare gate cells formed on the integrated circuit chip, for use in modification of functionality of the pre-defined logic circuit;
• and
• a multi-layer interconnection structure comprising a plurality of metal layers formed one above another on the integrated circuit chip,
• each spare gate cell comprising:
• a configurable building block circuit having at least two input leads and an output lead, the configurable building block circuit being capable of selectively performing a plurality of possible logic functions on signals appearing on the input leads to produce a logic signal on the output lead, selection of a function from the plurality of possible logic functions depending on connections of the input leads of the configurable building block circuit;
• and
• an inverter having an input and an inverted signal output;
• wherein the input leads of the configurable building block circuit and the input of the inverter all have accessible appearances at a top-most one of the metal layers of the interconnection structure.

An integrated circuit device, comprising:

• a network interface controller circuit formed on an integrated circuit chip, the network interface controller circuit comprising a bus interface unit for providing data communications with a host system and a network interface unit coupled to the bus interface for providing data communications through a physical transceiver to and from a communication media;
• and
• a plurality of spare gate cells formed on the integrated circuit chip, for use in modification of functionality of the pre-defined logic circuit;
• and
• a multi-layer interconnection structure comprising at least three layers of metal formed on the integrated circuit chip,
• each spare gate cell comprising:
• a configurable building block circuit comprising a plurality of semiconductor devices formed on the integrated circuit chip, the configurable building block circuit having at least two input leads and an output lead, the configurable building block circuit being capable of selectively performing a plurality of possible logic functions on signals appearing on the input leads to produce a logic signal on the output lead, selection of a function from the plurality of possible logic functions depending on connections of the input leads of the configurable building block circuit;
• and
• an inverter comprising a plurality of semiconductor devices formed on the integrated circuit chip, said inverter having an input and an inverted signal output;
• wherein:
• the input leads of the configurable building block circuit and the input of the inverter all have accessible appearances at a top-most one of the layers of metal of the interconnection structure, and
• at least two of the configurable building block circuits are different from each other and are configurable to perform different pluralities of possible logic functions.