Semiconductor power device manufacture

A method of manufacturing a semiconductor power device having a trench-gate capacitively coupled to a channel-accommodating portion of a body region of a first conductivity type, including the steps of:

• (a) providing at a major surface of a semiconductor body where the body region is provided a mask that comprises a thicker second layer of a second material on a thinner first layer of an oxidation-masking first material, the mask having a window where the trench-gate is to be provided in the semiconductor body,
• (b) etching a trench in the semiconductor body at the window,
• (c) providing the trench-gate in the trench and in the window by steps that include depositing doped semiconductor gate material on the mask and in the window and etching away the doped semiconductor gate material from on top of the mask,
• (d) removing the second layer from the mask and then etching back the doped semiconductor gate material from sides of the window in the first layer so as to leave the doped semiconductor gate material freely upstanding within the window,
• (e) oxidising an upper part of the doped semiconductor gate material, while using the first layer as an oxidation mask, so as to form an upstanding insulated gate structure that has an insulating overlayer and that protrudes above the major surface of the semiconductor body,
• (f) removing the first layer and then forming a sidewall extension at upstanding sides of the insulated gate structure so as to form a step with an adjacent surface area of the body region of the first conductivity type, the sidewall extension comprising doped semiconductor material of opposite, second conductivity type which is insulated from the trench-gate and which provides a source region of the device, the source region forming a p-n junction with the channel-accommodating portion,
• (g) introducing dopant of the first conductivity type into the semiconductor body via the said adjacent surface area while using the sidewall extension to mask an underlying area of the semiconductor body, and thereby to provide the body region with a localised high-doped portion that has a doping concentration of the first conductivity type which is higher than that of the channel-accommodating portion but lower than the conductivity-determining dopant concentration of the doped semiconductor material of the sidewall extension that provides the source region, which high-doped portion is provided to a greater depth in the semiconductor body than the p-n junction between the source region and the channel-accommodating portion of the body region, and
• (h) depositing a source electrode over the step so as to contact the doped semiconductor material of the sidewall extension and the high-doped portion of the body region at the adjacent surface area of the semiconductor body.