Method for etching a trench having rounded top and bottom corners in a silicon substrate

A method for plasma etching a trench having a rounded bottom corner in a silicon substrate, the method comprising the following steps:

• a) providing a semiconductor structure comprising a patterned hard mask, with a silicon substrate beneath said hard mask;
• b) plasma etching an upper portion of a trench to a depth within the range of about 75% and about 95% of a desired final depth of said trench, wherein etching is performed using a first process chamber pressure;
• and
• c) plasma etching said trench to said desired final depth, wherein etching is performed using a second process chamber pressure which is at least about two times greater than said first process chamber pressure.

A method for plasma etching of a trench having a rounded top corner and a rounded bottom corner in a silicon substrate, the method comprising the following steps:

• a) providing a semiconductor structure comprising residue from an organic photoresist, and a silicon oxide layer overlying a silicon substrate;
• b) plasma etching at least a portion of said organic photoresist residue, through said silicon oxide layer, and into an upper portion of said silicon substrate using active species generated from a feed gas comprising carbon and fluorine;
• c) plasma etching a trench into said silicon substrate using a two-step process comprising:
• i) plasma etching an upper portion of said trench to a depth within the range of about 75% and about 95% of a desired final depth of said trench, wherein etching is performed using a first process chamber pressure within the range of about 10 mTorr to about 50 mTorr;
• and
• ii) plasma etching said trench to said desired final depth, wherein etching is performed using a second process chamber pressure within the range of about 50 mTorr to about 100 mTorr.

A method for plasma etching a trench having a rounded top corner and a rounded bottom corner in a silicon substrate, the method comprising the following steps:

• a) providing a semiconductor structure comprising a patterned hard mask, and a silicon oxide layer overlying a silicon substrate;
• b) plasma etching through said silicon oxide layer, while forming an extension on a sidewall of said patterned hard mask, using reactive species generated from a feed gas comprising a source of fluorine, a source of carbon, a source of hydrogen, and a source of high energy species which provide physical bombardment of native oxide surfaces;
• c) plasma etching a trench into said silicon substrate using a two-step process comprising:
• i) plasma etching an upper portion of said trench to a depth within the range of about 75% and about 95% of a desired final depth of said trench, wherein etching is performed using a first process chamber pressure within the range of about 10 mTorr to about 50 mTorr;
• and
• ii) plasma etching said trench to said desired final depth, wherein etching is performed using a second process chamber pressure within the range of about 50 mTorr to about 100 mTorr.

An apparatus, comprising:

• (a) a memory that stores instructions for:
• plasma etching a trench having a rounded top corner in a silicon substrate, wherein the plasma etching process comprises the following steps:
• i) providing a semiconductor structure comprising residue from an organic photoresist, and a silicon oxide layer overlying a silicon substrate;
• ii) plasma etching at least a portion of said organic photoresist residue, through said silicon oxide layer, and into an upper portion of said silicon substrate using active species generated from a feed gas comprising carbon and fluorine;
• iii) plasma etching a trench into said silicon substrate using active species generated from a feed gas different from that used in step ii);
• (b) a processor adapted to communicate with the memory and to execute the instructions stored by the memory;
• (c) an etch chamber adapted to expose the substrate to the etchant in accordance with instructions from the processor;
• and
• (d) a port adapted to pass communications between the processor and the etch chamber.

An apparatus, comprising:

• (a) a memory that stores instructions for:
• plasma etching a trench having a rounded top corner in a silicon substrate, wherein the plasma etching process comprises the following steps:
• i) providing a semiconductor structure comprising a patterned hard mask, and a silicon oxide layer overlying a silicon substrate;
• ii) plasma etching through said silicon oxide layer, while forming an extension on a sidewall of said patterned hard mask, using reactive species generated from a feed gas comprising a source of fluorine, a source of carbon, a source of hydrogen, and a source of high energy species which provide physical bombardment of native oxide surfaces;
• iii) plasma etching a trench into said silicon substrate using active species generated from a feed gas different from that used in step ii);
• (b) a processor adapted to communicate with the memory and to execute the instructions stored by the memory;
• (c) an etch chamber adapted to expose the substrate to the etchant in accordance with instructions from the processor;
• and
• (d) a port adapted to pass communications between the processor and the etch chamber.

An apparatus, comprising:

• (a) a memory that stores instructions for:
• plasma etching a trench having a rounded bottom corner in a silicon substrate, the method comprising the following steps:
• i) providing a semiconductor structure comprising a patterned hard mask, with a silicon substrate beneath said hard mask;
• ii) plasma etching an upper portion of a trench to a depth within the range of about 75% and about 95% of a desired final depth of said trench, wherein etching is performed using a first process chamber pressure;
• and
• iii) plasma etching said trench to said desired final depth, wherein etching is performed using a second process chamber pressure which is at least about two times greater than said first process chamber pressure;
• (b) a processor adapted to communicate with the memory and to execute the instructions stored by the memory;
• (c) an etch chamber adapted to expose the substrate to the etchant in accordance with instructions from the processor;
• and
• (d) a port adapted to pass communications between the processor and the etch chamber.