Sigma-delta analog-to-digital converter
AssigneeYokogawa Electric Corporation
InventorMasami Wada
Life of this patent
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Abstract
A sigma-delta analog-to-digital (A/D) converter comprising an input terminal, an adder, an integrator, a comparator and a flip flop circuit connected in series, with an output signal of the flip flop circuit being provided at an output terminal, and being fed back to the adder through a digital-to-analog (D/A) converter, so that the A/D converter provides a pulse density signal corresponding to a given input signal, wherein the comparator output is isolated from the input terminal of the flip flop circuit, and the output of the flip flop circuit is isolated from the D/A converter input terminal thereby achieving reduction of current consumption. The invention is useful in two wire vortex flowmeters, for example.
Claims23
In a sigma-delta analog-to-digital converter comprising an input terminal;
- an output terminal;
- adder means;
- integrator means;
- comparator means;
- digital-to-analog converter means;
- and a flip flop circuit;
- wherein an output signal from said flip flop circuit is supplied to said output terminal and fed back to said adder means through said digital-to-analog converter means to provide a pulse density signal corresponding to a given input signal;
- the improvement comprising
- means for isolating an output terminal of said comparator means from an input terminal of said flip flop circuit and for isolating an output terminal of said flip flop circuit from an input terminal of said digital-to-analog converter means.
A sigma-delta analog-to-digital converter comprising:
- an input terminal;
- adder means;
- integrator means;
- comparator means for comparing output of said integrator means with a predetermined setpoint to provide result of comparison as a single bit digital value;
- a flip flop circuit for holding output of said comparator means in synchronization with a trigger applied to said flip flop circuit;
- a digital-to-analog converter means;
- and an output terminal, wherein an output signal from said flip flop circuit is supplied to said output terminal and is fed back to said adder means through said digital-to-analog converter means to output a pulse density signal corresponding to a given input signal;
- and further comprising a trigger control means for controlling timing of a trigger signal to be applied to said flip flop circuit.
In a signma-delta analog-to-digital converter comprising:
- an input terminal;
- an output terminal;
- adder means;
- integrator means;
- comparator means;
- digital-to-analog converter means;
- and flip flop circuit;
- wherein an output signal from said flip flop circuit is supplied to said output terminal and fad back to said adder means through said digital-to-analog converter means thereby to provide a pulse density signal corresponding to a given input signal;
- the improvement comprising:
- first isolation means for isolating an output terminal of said comparator means from an input terminal of said flip flop circuit, wherein said first isolation means extracts a differential signal from an output signal of said comparator means, transfers said differential signal in an electricity isolated manner, demodulates said output signal of said comparator means according to said transferred differential signal, and provides the demodulated signal to said flip flop circuit;
- second isolation means for isolating an output terminal of said flip flop circuit from an input terminal of said digital-to-analog converter means;
- wherein said second isolation means extracts a differential signal from an output signal of said flip flop circuit, transfers said differential signal in an electrically isolated manner, demodulates said output signal of said flip flop circuit according to said transferred differential signal, and provides the demodulated signal to said digital-to-analog converter means;
- first startup means for generating a pulse signal reverse in polarity to an output signal of said comparator means when said output signal of said comparator means does not agree in polarity with an output signal of said second isolation means, thereby providing a synthesized signal obtained by summing a pulse signal and an output signal of said comparator means to said first isolation means;
- and
- second startup means for checking that said output signal of said comparator means does not change for a specific length of time, thereby providing an output inversion command to said first isolation means.
Dependencies are inferred from the claim text.