Correction static errors in a/d-converter
AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorsJan-Erik Eklund, Mikael Rudberg
Life of this patent
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AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorsJan-Erik Eklund, Mikael Rudberg
Estimating the term…
An analog-to-digital converter (ADC) has a histogram based correction of static errors. In a control and calculating unit (23) of the converter thus the counts of uncorrected digital output codes are stored in a memory (51). From the stored counts a model distribution is determined in a calculation unit, e.g. by estimating an expected gaussian distribution. The model distribution is compared to the measured counts and relative errors of the counts are calculated, the relative errors indicating errors in coarse reference levels. The errors are used for calculating correction terms (L(A)) stored in a correction table (47). The correction terms are used by an output calculating unit (43′) to calculate corrected, more accurate output codes. For a parallel ADC device having several cells, the histograms in the cells can be used to correct for gain and offset errors. Also, the histogram can be used in a built-in self test. A reference level generator can be only partially common to the cells in a parallel ADC providing accurate coarse levels without cross-talk.
A method of determining digital values from analog values successively sampled from an analog signal, the method comprising the steps of:
A method of correcting static errors in an analog-to-digital converter receiving analog values successively sampled from an analog signal and providing uncorrected digital values representing the sampled analog values, the method comprising the steps of:
A method of determining digital values from analog values successively sampled from an analog signal, the method comprising the steps of:
A converter for determining digital values from analog values successively sampled from an analog signal, the converter comprising:
A device for correcting static errors in an analog-to-digital converter, the device comprising:
A device for determining digital values from analog values successively sampled from an analog signal, the device comprising:
A parallel converter device comprising a plurality of element converter devices working in parallel for determining digital values from analog values successively sampled from an analog signal, each element device arranged to provide uncorrected digital values representing sampled analog values, the parallel converter device further comprising:
A parallel converter device comprising a plurality of element converter devices working in parallel for determining digital values from analog values successively sampled from an analog signal, a comparator included in each element device to compare sampled analog values to sequence of reference values obtained from a subsequence of coarse reference values and a subsequence of fine reference levels, as generated by a reference level generator, wherein the subsequence of coarse reference levels is generated by parts of the reference level generator which are individual to each element device and that the subsequence of fine reference levels is generated by a single part of the reference level generator which is common to all element devices.
Dependencies are inferred from the claim text.