Back to results
US 6,229,188 B1Granted
MOS field effect transistor and its manufacturing method
AssigneeSeiko Instruments Inc.
InventorsKenji Aoki, Ryoji Takada
Life of this patent
Estimating the term…
Abstract
The present invention provides novel structures of MOS field effect transistor which operate with high speed and low power consumption. This has been achieved through providing epitaxial growth layers on a substrate of high impurity doping concentration in which the thickness of epitaxial growth layers is controlled with a degree of accuracy on the order of a single atom layer.
Claims22
A MOS field effect transistor comprising:
- a semiconductor substrate;
- and an epitaxially grown layer provided on said substrate, the impurity concentration of said epitaxially grown layer being lower than that of said substrate, and the thickness of said epitaxially grown layer being the same as or less than the thickness of a depletion region at a channel region of the transistor.
A MOS field effect transistor comprising:
- a semiconductor substrate having a predefined channel-forming region and having a given impurity concentration;
- and an epitaxially grown layer grown on the semiconductor substrate over the channel-forming region, the epitaxially grown layer having an impurity concentration lower than that of the semiconductor substrate and having a thickness not greater than that of a depletion region at the channel region.
A MOSFET comprising:
- a semiconductor substrate;
- a source region formed in the semiconductor substrate;
- a drain region formed in the semiconductor substrate spaced apart from the source region;
- a gate electrode formed over the semiconductor substrate between the source region and the drain region;
- a thin film layer formed on the semiconductor substrate between the source region and the drain region;
- and a channel region formed between the source region and the drain region including a depletion region formed in the thin film region in response to the application of a voltage to the gate electrode;
- wherein the thin film layer has an impurity concentration lower than that of the substrate and a thickness no greater than that of the depletion region, such that a threshold of the MOSFET may be controlled by selecting the thickness of the thin film layer to avoid short channel effects.
4 more elements
Dependencies are inferred from the claim text.