US 6,228,675 B1 · Microcap wafer-level package with vias

Abstract

A microcap wafer-level package is provided in which a micro device is connected to bonding pads on a base wafer. A peripheral pad on the base wafer encompasses the bonding pads and the micro device. A cap wafer is processed to form wells of a predetermined depth in the cap wafer. A conductive material is made integral with the walls of the wells in the cap wafer. The cap wafer has contacts and a peripheral gasket formed thereon where the contacts are capable of being aligned with the bonding pads on the base wafer, and the gasket matches the peripheral pad on the base wafer. The cap wafer is then placed over the base wafer so as to bond the contact and gasket to the pads and form a hermetically sealed volume within the peripheral gasket. The cap wafer is thinned to form a “microcap”. The microcap is thinned below the predetermined depth until the semiconductor dopant is exposed to become conductive vias through the cap wafer to outside the hermetically sealed volume.

Claims20

Dependent claims

A method of manufacturing a wafer package comprising:

providing a first wafer, a second wafer, and a micro device;
forming a bonding pad and a peripheral pad on said first wafer, said peripheral pad encompassing said bonding pad;
forming a seal on said second wafer, said seal configured to match said peripheral pad;
forming a well in said second wafer;
forming a conductor in said well integral with said second wafer;
bonding said first and said second wafers together using said seal to form a hermetically sealed volume therebetween, said second wafer positionable with said conductor in conductive contact with said bonding pad, and said micro device disposed in said hermetically sealed volume and connected to said bonding pad;
and
removing a portion of said second wafer whereby said conductor is exposed outside said hermetically sealed volume.

5 more elements

A method of manufacturing a wafer package comprising:

providing a base wafer, a cap wafer, and a micro device;
forming a bonding pad and a peripheral pad on said base wafer, said peripheral pad encompassing said bonding pad;
forming a well of a predetermined depth in said cap wafer in a position positionable over said bonding pad;
forming a conductor integral with said cap wafer in said well;
forming a contact and a seal on said cap wafer, said contact connected to said conductor and configured to align with said bonding pad, and said seal encompassing said contact and substantially matching said peripheral pad;
bonding said base wafer and said cap wafer together using said seal to bond to said peripheral pad to form a hermetically sealed volume therein, said cap wafer positionable with said contact bonded to said bonding pad, and one of said wafers having said micro device associated therewith disposed in said hermetically sealed volume between said seal and connected to said bonding pad;
and
removing a portion of said cap wafer until the thickness of said cap wafer is less than the predetermined depth of said well whereby a conductive via is formed in contact with said bonding pad on said base wafer.

5 more elements

Dependencies are inferred from the claim text.

Microcap wafer-level package with vias

Life of this patent

Microcap wafer-level package with vias

Life of this patent

Abstract

Claims20