Data processing circuit with cache memory and cache management unit for arranging selected storage location in the cache memory for reuse dependent on a position of particular address relative to current address
AssigneeU.S. Philips Corporation
InventorsPieter Van Der Wolf, Pieter Struik
Life of this patent
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Abstract
The processing circuit contains a cache management unit which keeps information about a stream of addresses among addresses accessed by the processor. The cache management unit updates a current address for the stream in response to progress of execution of the program. The cache management unit is make selected storage locations in the cache memory available for reuse, a storage location in the cache memory which is in use for the data corresponding to the particular address being made available for reuse dependent on a position of the particular address relative to the current address.
Claims12
A data processing circuit comprising:
- a processor for executing a program;
- a cache memory for caching data for access by the processor;
- and
- a cache management unit arranged for keeping information about a stream of addresses among addresses accessed by the processor and for managing storage of data in the cache memory depending on whether or not data corresponds to a particular address from the stream, the cache management unit updating a current address for the stream in response to progress of execution of the program, characterized in that the cache management unit is arranged to make selected storage locations in the cache memory available for reuse, and a storage location in the cache memory which is in use for the data corresponding to the particular address is being made available for reuse dependent on a position of the particular address relative to the current address.
Dependencies are inferred from the claim text.