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US 6,219,397 B1Granted
Low phase noise CMOS fractional-N frequency synthesizer for wireless communications
AssigneeSamsung Electronics Co., Ltd.
InventorByeong-Ha Park
Life of this patent
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Abstract
A PLL-based CMOS fractional-N frequency synthesizer, which has an on-chip LC Voltage Controlled Oscillator. A higher-order discrete sigma-delta modulator is used in the fractional-N frequency synthesizer resulting in a strong attention at low frequencies for quantization noise. The synthesizer employs a noise shaping method to suppress fractional spurs using the high-order sigma-delta modulator.
Claims16
A frequency synthesizer comprising:
- a first means for dividing an externally provided reference frequency data signal by a given divide ratio;
- a second means for generating an output signal of variable frequency in response to a frequency control voltage signal;
- a third means for selecting one of multiple moduli in response to a scaling control data signal and for scaling down the output signal of the second means by the selected modulus;
- a fourth means for generating the scaling control data signal in response to an externally provided frequency setting data signal;
- a fifth means for detecting phase difference between an output signal of said first means and the output signal of said third means to generate a phase error signal;
- and
- a sixth means for filtering the phase error signal to provide it to said second means as the frequency control voltage signal;
- wherein said third means comprises a control logic operating in response to the scaling control signal, a dual modulus prescaler for scaling down the output signal of said second means by either one of two moduli in response to a mode control signal from the control logic, an extender for extending an output signal of said dual modulus prescaler to generate a plurality of output signals under the control of the control logic, and a multiplexer for selecting one of the output signals of said extender responsive to a select signal from the control logic to provide it to said fifth means.
5 more elements
A frequency synthesizer comprising:
- a reference divider for dividing an externally provided reference frequency data signal by a given divide ratio;
- a voltage-controlled oscillator for generating an output signal of variable frequency in response to a frequency control voltage signal;
- a multimodulus prescaler for selecting one of multiple moduli in response a scaling control data signal and for scaling down the output signal of said oscillator by the selected modulus;
- a sigma-delta modulator for generating the scaling control data signal in response to an externally provided frequency setting data signal;
- a phase frequency detector for detecting phase difference between an output signal of said reference divider and the output signal of said, multimodulus prescaler to generate a phase error signal;
- and
- a loop filter for filtering the phase error signal to provide it to said oscillator as the frequency control voltage signal;
- wherein said multimodulus prescaler comprises a control logic operating in response to the scaling control signal, a dual modulus prescaler for scaling down the output signal of said oscillator by either one of two moduli in response to a mode control signal from the control logic, an extender for extending an output signal of said dual modulus prescaler to generate a plurality of output signals under the control of the control logic, and a multiplexer for selecting one of the output signals of said extender responsive to a select signal from the control logic to provide it to said phase frequency detector.
5 more elements
Dependencies are inferred from the claim text.