High bandwidth passive integrated circuit tester probe card assembly
AssigneeFormFactor, Inc.
InventorCharles A. Miller
Life of this patent
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Abstract
Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.
Claims22
A signal path for linking a node of an electronic device to a terminal to an electronic device tester, the signal path comprising:
- a probe for contacting said node;
- and
- a conductive path for linking said probe to said terminal,
- wherein said node, said probe, said terminal and said conductive path have impedances sized relative to one another to substantially optimize a frequency response characteristic of said signal path.
A signal path for linking a node of an integrated circuit (IC) to a terminal of an IC tester, the signal path comprising:
- a conductive pad implemented on said IC and linked to said node;
- a probe for contacting said conductive pad;
- and
- conductive means for linking said probe to said terminal,
- wherein said conductive pad, said terminal and said conductive means have impedances sized relative to one another to substantially optimize a frequency response characteristic of said signal path.
A signal path for linking a node of an integrated circuit (IC) to a terminal of an IC tester, the signal path comprising:
- a conductive pad implemented on said IC and linked to said node;
- a probe for contacting said conductive Pad;
- and
- conductive means for linking said probe to said terminal,
- wherein said conductive pad, said terminal and said conductive means have impedances sized relative to one another to substantially optimize a frequency response characteristic of said signal path, and
- wherein said conductive means comprises:
- a printed circuit board via having a capacitance that is one of said impedances,
- a trace having a characteristic impedance that is one of said impedances, and
- a spring contact having an inductance that is one of said impedances.
A method for sizing impedances of a signal path connecting a node of an integrated circuit (IC) to a terminal of an IC tester, wherein the signal path comprises a bond pad connected to said node, a probe contacting said bond pad, and conductive means linking said probe to said terminal, the method comprising the step of
- adjusting impedances of said bond pad, said probe, and said conductive means relative to one another so as to optimize a characteristic of a frequency response of said signal path.
A signal path for linking a node of an integrated circuit (IC) to a terminal of an IC tester, the signal path comprising:
- a conductive pad implemented on said IC and linked to said node;
- a probe for contacting said conductive pad;
- and
- conductive means for linking said probe to said terminal,
- wherein said conductive pad, said probe, said terminal and said conductive means have impedances sized relative to one another to substantially optimize a frequency response characteristic of said signal path, and
- wherein said conductive means comprises a printed circuit board via having a capacitance that is one of said impedances.
A signal path for linking a node of an integrated circuit (IC) to a terminal of an IC tester, the signal path comprising:
- a probe for contacting said node;
- and
- conductive means for linking said probe to said terminal,
- wherein said node, said probe and said conductive means have impedances sized relative to one another to substantially optimize a frequency characteristic of said signal path, and
- wherein said conductive means comprises a printed circuit board via having a capacitance that is one of said impedances.
Dependencies are inferred from the claim text.