Method for a highly linear variable-gain low noise amplifier
AssigneeMicrotune (Texas), L.P.
InventorRichard William Ezell
Life of this patent
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Abstract
A highly linear variable-gain low noise amplifier is constructed using a transistor pair having variable gain control. The gain of the transistor pair is achieved by a segmented resistor having controllable PMOS (or NMOS) components. The circuit includes a variable voltage source and operates to handle wideband radio transmissions via broadcast or cable.
Claims30
A method of adjusting a gain of a linear amplifier, wherein said amplifier includes at least a pair of transistors, said method comprising the steps of:
- varying a set of impedances of said amplifier in a controlled linear manner so as to adjust said gain while maintaining a Third-Order Intercept Point (IP3) constant, wherein said varying step includes the step of:
- sequentially adding into a circuit path of said transistor pair an impedance value including one or more resistors each said resistor having associated therewith a MOS device operable for changing the effective resistance of said associated resistor, wherein said sequentially adding step includes the step of varying the gate voltage of said MOS device to control the effective resistance of said device;
- and
- adjusting bias conditions through said transistor pair consistent with the varying of said impedances.
A method of operating an amplifier comprising at least one pair of bipolar transistors, said method including the steps of:
- decreasing the gain of said amplifier from a high value while holding a third order output intercept (OIP3) of said amplifier constant while a third order input intercept (IIP3) of said amplifier increases, wherein said decreasing said gain step includes the steps of varying an emitter impedance and maintaining a collector impedance;
- and
- below a transition point continuing to decrease said gain while maintaining a constant IIP3 and while decreasing said OIP3, wherein said continuing to decrease step includes the steps of varying said collector impedance and maintaining said emitter impedance.
A method of amplifying cable channel signals, wherein said signals require high output linearity, said method including the steps of:
- passing said signals through a gain stage circuit path of an amplifier, said amplifier comprising a pair of bipolar transistors;
- and
- selectively varying the impedance in said gain stage circuit path in a highly controlled linear fashion responsive to said high output linearity requirement of said signals, wherein said selectively varying comprises:
- varying an emitter impedance;
- and
- maintaining a collector impedance.
A method of amplifying cable channel signals, wherein said signals require high output linearity, said method comprising the steps of:
- passing said signals through a gain stage circuit path of an amplifier, said amplifier comprising a pair of MOS transistors;
- and
- selectively varying the impedance in said gain stage circuit path in a highly controlled linear fashion responsive to a linearity requirement of said signals, wherein said selectively varying step comprises:
- varying a source impedance;
- and
- maintaining a drain impedance.
A method of amplifying antenna channel signals, wherein said signals require a high input linearity, said method including the steps of:
- passing said signals through a gain stage circuit path of an amplifier, said amplifier comprising a pair of bipolar transistors;
- and
- selectively varying the impedance in said gain stage circuit path in a highly controlled linear fashion responsive to a linearity requirement of said signals, wherein said selectively varying step includes:
- varying a collector impedance;
- and
- maintaining an emitter impedance.
A method of amplifying antenna channel signals, wherein said signals require high input linearity, said method including the steps of:
- passing said signals through a gain stage circuit path of an amplifier, said amplifier comprising a pair of MOS transistors;
- and
- selectively varying the impedance in said gain stage circuit path in a highly controlled linear fashion responsive to a linearity requirement of said signals, wherein said selectively varying step includes:
- varying a drain impedance;
- and
- maintaining a source impedance.
A method of operating an amplifier comprising at least one pair of MOS transistors, said method including the steps of.
- decreasing the gain of said amplifier from a high value while holding a third order output intercept (OIP3) of said amplifier constant while a third order input intercept (IIP3) of said amplifier increases, wherein said decreasing said gain step includes the steps of varying a source impedance and maintaining a drain impedance;
- and
- below a transition point continuing to decrease said gain while maintaining a constant IIP3 and while decreasing said OIP3, wherein said continuing to decrease step includes the step of varying said drain impedance and maintaining said source impedance.
Dependencies are inferred from the claim text.