Secure data communication over a memory-mapped serial communications interface utilizing a distributed firewall
AssigneeVLSI Technology, Inc.
InventorsPaul S. Levy, Steve Cornelius
Life of this patent
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AssigneeVLSI Technology, Inc.
InventorsPaul S. Levy, Steve Cornelius
Estimating the term…
A distributed firewall is utilized in conjunction with a memory-mapped serial communications interface such as that defined by the IEEE 1394 specification to permit secure data transmission between selected nodes over the interface. The distributed firewall incorporates security managers in the selected nodes that are respectively configured to control access to their associated nodes, thereby restricting access to such nodes to only authorized entities. Furthermore, encrypted transmissions may be supported to restrict unauthorized viewing of data transmitted between the selected nodes over the interface. Implementation of the distributed firewall does not modify any critical specifications for the memory-mapped communications interface that would prevent the selected nodes from residing on the same interface as other nodes that adhere to such specifications but that do not support secure data transmission.
A data processing system, comprising:
A circuit arrangement for interfacing an electronic device to a memory-mapped serial communications interface of the type that supports peer-to-peer communications between a plurality of nodes, the circuit arrangement comprising:
A method of controlling access to first and second nodes from a plurality of nodes coupled to one another over a memory-mapped serial communications interface of the type supporting peer-to-peer communications between the plurality of nodes, the method comprising:
A method of controlling access to first and second nodes from a plurality of nodes coupled to one another over a memory-mapped serial communications interface of the type supporting peer-to-peer communications between the plurality of nodes, the method comprising:
A data processing system, comprising:
A circuit arrangement for interfacing an electronic device to a memory-mapped serial communications interface of the type that supports peer-to-peer communications between a plurality of nodes, the circuit arrangement comprising:
A method of controlling access to first and second nodes from a plurality of nodes coupled to one another over a memory-mapped serial communications interface of the type supporting peer-to-peer communications between the plurality of nodes, the method comprising:
Dependencies are inferred from the claim text.