Configurable I/O circuitry defining virtual ports
AssigneeCradle Technologies, Inc.
InventorCecil H. Kaplinsky
Life of this patent
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Abstract
Configurable I/O circuitry having a plurality of configurable input/output elements, each of which connects one of a plurality of bits of a data bus to a corresponding one of the input/output terminals. Multiple clock selects and programmable enable signals can be connected to different interface elements to control activation of the interface element to which it is connected. The activated interface elements make up a virtual port that can be of any arbitrary bit width that is less than or equal to the fixed width of a physical port. This allows virtual ports on the data bus to be constructed that are narrower than the physical ports so that narrower data can be utilized in the port without causing the potential use of any of the data pins to be lost.
Claims20
In an integrated circuit of the type having a bus of a fixed bit width for transmission of information, a plurality of input/output terminals and a plurality of physical ports, each of the physical ports having a fixed bit width and connecting the bus to a corresponding set of input/output terminals, configuration circuitry defining one or more virtual ports comprising:
- a plurality of configurable input/output interface elements, each interface element including a storage means and connecting one of a plurality of bits of the bus to a corresponding one of the input/output terminals;
- at least one selectable clock connected to the storage means of each interface element;
- at least one programmable enable connected to each interface element, wherein multiple clocks and program enables may be connected to different ones of the interface elements and wherein each of the clocks and programmable enables are configured to control the activation of the interface element to which it is connected;
- and
- wherein the activated input/output elements make up a virtual port, the virtual port being of an arbitrary bit width that is less than or equal to the fixed bit width of the physical ports.
An integrated circuit comprising:
- a bus having a fixed bit width for transmission of information;
- a plurality of input/output terminals;
- a plurality of physical ports, each of the physical ports having a fixed bit width and having a plurality of configurable input/output interface elements, each interface element including a storage means and connecting one of a plurality of bits of the bus to a corresponding one of the input/output terminals;
- at least one selectable clock connected to the storage means of each interface element;
- at least one programmable enable paired with the clock and connected to each interface element, wherein multiple clocks and program enables may be connected to different ones of the interface elements and wherein each of the clocks and programmable enables are configured to control the activation of the interface element to which it is connected;
- and
- wherein the activated input/output elements make up a virtual port, the virtual port being of an arbitrary bit width that is less than or equal to the fixed bit width of the physical ports.
Dependencies are inferred from the claim text.