Circuit and method for specifying performance parameters in integrated circuits

A performance specifying circuit for recording performance parameters of a functional circuit that is adapted to operate in synchronism with a clock signal applied to the functional circuit, the performance specifying circuit and the functional circuit being fabricated in a common integrated circuit, the performance specifying circuit comprising:

• a speed grade register programmable by a manufacturer of the integrated circuit to specify a speed performance capability of the functional circuit;
• a performance data recording circuit recording a plurality of sets of performance parameters of the functional circuit, the performance parameters in each set being specified for a respective one of a plurality of speed performance capabilities;
• and
• a performance data selecting circuit coupled to the speed grade register, and the clock speed register, the performance data selecting circuit being operable to select one of the sets of recorded performance parameters as a function of the programming of the speed grade register.

A performance specifying circuit for recording performance parameters of a functional circuit that is adapted to operate in synchronism with a clock signal applied to the functional circuit, the performance specifying circuit and the functional circuit being fabricated in a common integrated circuit, the performance specifying circuit comprising:

• a clock speed register programmable by a user of the integrated circuit to specify the frequency of the clock signal that will be applied to the functional circuit during operation of the functional circuit;
• a performance data recording circuit recording a plurality of sets of performance parameters of the functional circuit, the performance parameters in each set being specified for a respective one of a plurality of frequencies of the clock signal;
• and
• a performance data selecting circuit coupled to the clock speed register and the performance data recording circuit, the performance data selecting circuit being operable to select one of the sets of recorded performance parameters as a function of the programming of the programming of the clock speed register.

A computer system, comprising:

• a clock circuit generating a clock signal;
• a processor coupled to the clock circuit to receive the clock signal, the processor having a processor bus;
• an input device coupled to the processor through the processor bus adapted to allow data to be entered into the computer system;
• an output device coupled to the processor through the processor bus adapted to allow data to be output from the computer system;
• and
• an integrated circuit coupled to the clock circuit to receive the clock signal, the integrated circuit including a memory device adapted to operate in synchronism with the clock signal and a performance specifying circuit recording performance parameters of the memory device, the memory device being coupled to the processor bus to allow data to be read from the memory device by the processor and to allow data to be written to the memory device by the processor, the performance specifying circuit comprising:
• a speed grade register programmable by a manufacturer of the integrated circuit to specify a speed performance capability of the memory device;
• a clock speed register programmable by a user of the integrated circuit to specify the frequency of the clock signal;
• a performance data recording circuit recording a plurality of sets of performance parameters of the functional circuit, the performance parameters in each set being specified for a respective combination of speed performance capabilities and frequencies of the clock signal;
• and
• a performance data selecting circuit coupled to the speed grade register, the clock speed register, and the performance data recording circuit, the performance data selecting circuit being operable to select one of the sets of recorded performance parameters as a function of the programming of the speed grade register and the programming of the clock speed register.

A method of recording and reading performance parameters of an integrated circuit that is adapted to operate in accordance with a clock signal that may have one of a plurality of clock frequencies, the method comprising:

• testing the integrated circuit to measure at least one speed parameter of the integrated circuit;
• recording a speed grade value in the integrated circuit, the speed grade value corresponding to the measured speed parameter;
• determining the frequency of the clock signal;
• recording a clock speed value in the integrated circuit, the clock speed value corresponding to the determined frequency of the clock signal;
• recording in the integrated circuit a plurality of sets of performance parameters of the integrated circuit, the performance parameters in each set being specified for a respective combination of speed performance capabilities and frequencies of the clock signal;
• selecting one of the sets of recorded performance parameters as a function of the recorded speed grade value and the recorded clock speed value;
• and
• reading the selected set of performance parameters.

A method of recording and reading performance parameters of an integrated circuit, the method comprising:

• testing the integrated circuit to measure at least one speed parameter of the integrated circuit;
• recording a speed grade value in the integrated circuit, the speed grade value corresponding to the measured speed parameter;
• recording in the integrated circuit a plurality of sets of performance parameters of the integrated circuit, the performance parameters in each set being specified for a respective one of a plurality of speed performance capabilities;
• selecting one of the sets of recorded performance parameters as a function of the recorded speed grade value;
• and
• reading the selected set of performance parameters.

A method of recording and reading performance parameters of an integrated circuit that is adapted to operate in accordance with a clock signal that may have one of a plurality of clock frequencies, the method comprising:

• determining the frequency of the clock signal;
• recording a clock speed value in the integrated circuit, the clock speed value corresponding to the determined frequency of the clock signal;
• recording in the integrated circuit a plurality of sets of performance parameters of the integrated circuit, the performance parameters in each set being specified for a respective one of a plurality of frequencies of the clock signal;
• selecting one of the sets of recorded performance parameters as a function of the recorded clock speed value;
• and
• reading the selected set of performance parameters.