Push-to-talk interface circuit for a radio communication system

In a push-to-talk radio system which uses an indicator signal to command a radio to begin transmission, an interface circuit responsive to an input stimulus for providing said output indicator signal of a first level corresponding to a transmit mode and a second level corresponding to a non-transmission mode for causing said radio to commence transmission, said interface circuit comprising:

• a FET having a gate, source, and drain, said source coupled to said input stimulus via a first resistor in combination with a first diode, said gate coupled to said input stimulus via a second resistor in combination with a second diode, said drain coupled to an output terminal for providing said indicator signal, wherein said second diode is coupled between said gate and a reference potential, said second diode having a first terminal coupled to the first terminal of said second resistor and wherein a third diode is coupled between said drain and said reference potential for limiting said output indicator signal, wherein a pull-up resistor is coupled between said drain and an external supply voltage for providing said output indicator signal at said second level, and
• wherein said FET is operable in a first conducting mode when a gate to source voltage exceeds a predetermined threshold responsive to a first amplitude region of said input stimulus to cause said output indicator signal to be at said second level indicative of non-transmission, and
• in a second non-conducting mode when said gate to source voltage does not exceed the predetermined threshold in response to said input stimulus having a second amplitude region to cause said output indicator signal to be at said first level indicative of the transmission mode wherein said first, second, and third resistors, and said first and second diodes responsive to said input stimulus operate to vary said FET gate to source voltage and route said current through said circuit to cause said FET to operate in said conducting and non-conducting modes.

A push-to-talk interface circuit responsive to an input stimulus having a first voltage range and a second voltage range for providing an output signal indicator to said radio indicative of a binary one corresponding to said second voltage range of said input stimulus and a binary zero corresponding to said first voltage range for causing said radio to initiate a transmission sequence upon receipt of said binary one value, said interface circuit comprising:

• a transistor having a first terminal coupled to a first controlling means for providing a first terminal voltage;
• a second terminal coupled to an output terminal of said circuit for providing said output indicator signal;
• and
• a third terminal coupled to a second control means for providing a second terminal voltage, wherein said transistor is activated when said second terminal voltage exceeds said first terminal voltage by a predetermined threshold indicative of said first voltage region of said input stimulus to cause said output signal indicator to be at a binary zero level, and wherein said transistor is inactive when said predetermined threshold is not exceeded to cause said output signal indicator to be of a binary one value, said first and second control means responsive to said input stimulus voltage region for varying said transistor terminal voltages and for routing current through said circuit thereby causing said transistor to be activated/inactivated according to said input stimulus.

A circuit for supplying an output signal in a first state or a second state to an output in response to a time-varying input voltage signal selectively applied to an input of the circuit, the circuit comprising:

• a field effect transistor (FET) having a gate electrode and first and second terminals coupling the input of the circuit to the output of the circuit such that, when said FET is conducting, the output signal is in the second state;
• a first clamping device coupled to the first terminal, said first clamping device clamping the first terminal to a potential of a smaller magnitude than the gate electrode when the input voltage signal applied to the input has a first polarity and the magnitude of the input voltage signal exceeds a predetermined first-polarity threshold, thereby causing said FET to conduct and the output signal to be in the second state;
• a second clamping device coupled to the gate electrode, said second clamping device clamping the gate electrode to potential of a smaller magnitude than the first terminal when the input voltage signal applied to the input has a second polarity and the magnitude of the input voltage signal exceeds a predetermined second-polarity threshold, thereby causing said FET to conduct and the output signal to be in the second state;
• said first terminal and said gate electrode being coupled to the input of the circuit such that said FET is non-conducting when the applied input voltage signal is between the predetermined first-polarity and second-polarity thresholds;
• and
• a power supply coupled to the output of the circuit to place the output signal in the first state when said FET is non-conducting, said power supply being coupled to said first terminal, said gate electrode, and said first and second clamping devices such that, when the input signal voltage is not applied to the input of the circuit, said FET is conducting and the output signal is in the second state.