MIL-STD-1553 buffer/driver

A serial bus buffer for conditioning and amplifying electrical signals on a line carrying MIL-STD-1553 bi-polar signals, comprising:

• a receiver connected to said signal line at a first bus, said receiver further including a threshold detector responsive only to incoming bi-polar line signals having a pre-selected minimum positive or negative amplitude, said receiver thereby producing a filtered bi-polar signal output;
• a signal conditioner receiving said filtered bi-polar signal output from said receiver, comprising:
• means for converting said filtered bi-polar signals into a first and second alternating uni-polar digital signals, one of said uni-polar signals having the timing of the positive excursion of said bi-polar signal beyond said minimum positive amplitude and the other uni-polar digital signal having the timing of the negative excursion of bi-polar signal beyond said minimal negative amplitude, each of said uni-polar signals having only two states, a zero-voltage state and a positive-voltage state;
• means for extending the positive-voltage state period of each uni-polar signal from the end of its positive-voltage state to the beginning of the next positive-voltage state of the other uni-polar signal so that no zero voltage state of both signals occurs at the same time;
• a timing circuit comprising a periodic signal sampler applied to both of said uni-polar signal outputs of said signal conditioner for retiming and combining them, said sampler including a clock and logic circuitry producing positive and negative digital outputs of “+1” or “−1” respectively when a positive-voltage state of said first or said second uni-polar signal is detected at periodic sample points, said sampler producing a “0” output null bus period, between all other sample points, said sampler further including means for combining said positive and negative digital outputs thus producing a bi-polar digital output having zero crossing points occurring only at said periodic sample points;
• and
• a transmitter comprising an amplifier connected to said signal conditioner for amplifying and delivering said bi-polar digital output of said timing circuit to a second bus, the delivered signal on said second bus having substantially the same pulse width as the bi-polar signal wave excursions of said incoming bi-polar line signal.