Watch dog timer system
AssigneeNEC Corporation
InventorAtsuya Yamashita
Life of this patent
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Abstract
A watch dog timer system which has an abnormality checking function of a high degree of reliability. In the watch dog timer system, abnormality of a computer system is detected as a variation of a value allocated in accordance with an execution condition of a program. To this end, a register receives execution state data defined in accordance with an execution condition of the program from a processor or CPU of the computer system and stores the execution state data before a counter of the watch dog timer system overflows. A comparator compares the execution condition data stored in the register and state sequence data indicative of a state sequence of the program stored in a ROM in advance with each other and generates a reset signal for resetting the computer system when the comparison reveals incoincidence.
Claims4
A watch dog timer system including a counter for resetting an entire computer when a value of said counter overflows, comprising:
- execution condition storage means for receiving execution state data defined in accordance with an execution condition of a program from a processor of said computer and storing the execution state data before said counter overflows;
- and
- comparison means for comparing the execution condition data stored in said execution condition storage means and state sequence data indicative of a state sequence of the program and generating a reset signal for resetting the entire computer when the comparison reveals incoincidence.
Dependencies are inferred from the claim text.