Test method for contacts in SRAM storage circuits

A test system for a Static Random Access Memory (SRAM), said test system comprising:

• a first and a second test probe, said first probe operable to contact a first bit line and said second test probe operable to contact a first complement bit line;
• a third test probe operable to contact and force a selected word line to a known state;
• a voltage source coupled to said first test probe, said voltage source operable to force said first bit line associated with said selected word line to a known state;
• a variable voltage coupled to said second test probe;
• a current sense means operable to measure the current of said variable voltage;
• and
• a storage circuit for storing voltage levels of said variable voltage and corresponding resulting current levels when said variable voltage is applied to SRAM storage circuits in said SRAM.

A process control system for a SRAM manufacturing line comprising:

• a wafer or packaged unit handling system for placing an SRAM wafer or packaged unit in a test station;
• an alignment system for aligning test probes to SRAM storage circuits;
• an SRAM measurement system, said SRAM measurement system further comprising;
• a first and a second test probe, said first probe operable to contact a first bit line and said second test probe operable to contact a first complement bit line;
• a third test probe operable to contact and force a selected word line to a known state;
• a voltage source coupled to said first test probe, said voltage source operable to force said first bit line associated with said selected word line to a known state;
• a variable voltage coupled to said second test probe;
• a current sense means operable to measure the current of said variable voltage;
• and
• a storage circuit for storing voltage levels of said variable voltage and corresponding resulting current levels when said variable voltage is applied to said SRAM storage circuits.