Built-in inspection template for a printed circuit
AssigneeInternational Business Machines Corporation
InventorsMarshall L. Brown, James A. Busby, Raymond A. Phillips, Jr., John A. Potenza, Jirina D. Shupp, J. Robert Young
Life of this patent
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Abstract
An improved bonding strip for a printed circuit to facilitate quality inspection. The bonding strip has functional regions and non-functional regions. A functional region is indicated by an area of the bonding strip having a first dimension in width. A non-functional region is indicated by an area of the bonding strip having a second dimension in width. The first dimension may be either wider or narrower than the second dimension.
Claims4
A bonding strip for an integrated circuit comprising:
- at least one region having a first dimension in width indicating a functional area on the bonding strip;
- and
- at least one region having a second dimension in width indicating a non-functional area on the bonding strip;
- wherein the second dimension is wider than the first dimension.
A bonding strip on a chip carrier for electrically connecting thereto at least one lead from a chip, the bonding strip comprising:
- at least one region having a first dimension in width indicating a functional area on the bonding strip, the functional area adapted to connect the at least one lead from the chip to the bonding strip;
- and
- at least one region having a second dimension in width indicating a non-functional area on the bonding strip;
- wherein the second dimension is wider than the first dimension.
In a printed circuit board having semiconductor devices, a bonding strip for electrically connecting thereto at least one lead from a semiconductor device, the bonding strip comprising:
- at least one region having a first dimension in width indicating a functional area on the bonding strip, the functional area adapted to connect the at least one lead from the semiconductor device to the bonding strip;
- and
- at least one region having a second dimension in width indicating a non-functional area on the bonding strip;
- wherein the second dimension is wider than the first dimension.
A method for indicating functional and non-functional regions on a bonding strip comprising the steps of:
- providing a semiconductor substrate having device and interconnection metallurgy;
- and
- depositing a bonding strip on the semiconductor substrate having (a) a first region of a first dimension in width, and (b) a second region of a second dimension in width, wherein the first region is used as the functional region and the second region is used as the non-functional region;
- wherein the second dimension is wider than the first dimension.
Dependencies are inferred from the claim text.