Multi-capacitor device

Abstract

A multi-capacitor device having a plurality of capacitors in a single circuit package is formed of a plurality of layers of dielectric material, preferably the same type of material that is commonly used to fabricate circuit boards. The plurality of layers are disposed in a vertically stacked relationship. Each capacitor is formed of first and second pluralities of planar electrodes formed on alternating layers of the stack. The first plurality of electrodes is disposed in a first vertically stacked array, and the second plurality of electrodes is disposed in a second vertically stacked array. Each vertical electrode array is provided with a via hole extending through all of its layers to connect all of the respective electrode array in parallel. At the upper surface of the assembly, each via hole is connected to a solder pad and disposed to be soldered to a connection point on a printed circuit board or the like. The assembly may be fabricated using standard techniques for manufacturing multilayer printed circuit boards. A large number of capacitors may be created on a single large format planar array, and then cut into individual packages having one or more capacitors in side-by-side relationship. Two or more layers of circuit board material may be deposited between the vertically stacked electrodes, to increase the breakdown voltage of the capacitors.

Dependencies are inferred from the claim text.