Semiconductor integrated circuit for performing data transfer
AssigneeNEC Corporation
InventorTadaomi Sakata
Life of this patent
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Abstract
A semiconductor integrated circuit for performing data transfer integrated circuit includes a first circuit, a second circuit, and first and second data converters. The first circuit outputs data of a plurality of bits. The second circuit receives the data from the first circuit via a data bus. The first data converter converts the data from the first circuit by a first conversion rule and outputs the data to the data bus. The second data converter converts the data from the data bus back to original data by a second conversion rule and outputs the data to the second circuit.
Claims11
A semiconductor integrated circuit for a semiconductor integrated circuit, comprising:
- a first circuit for outputting data of a plurality of bits;
- a second circuit for receiving the data from said first circuit via a data bus;
- first data conversion means for converting the data from said first circuit by a first conversion rule and outputting the data to the data bus;
- and
- second data conversion means for converting the data from the data bus back to original data by a second conversion rule and outputting the data to said second circuit.
A semiconductor integrated circuit for a semiconductor integrated circuit, comprising:
- a first circuit for outputting data of a plurality of bits;
- a second circuit for receiving the data from said first circuit via a data bus;
- first data conversion means for converting the data from said first circuit by a first conversion rule and outputting the data to the data bus;
- second data conversion means for converting the data from the data bus back to original data by a second conversion rule and outputting the data to said second circuit;
- and
- control means for controlling data conversion operation of said first and second data conversion means,
- wherein said first circuit is a memory for storing data in accordance with an address, and said controlling means controls said first and second data conversion means on the basis of an address signal for reading out data from said memory, and
- wherein said control means controls an ON/OFF state of data conversion operation of said first and second data conversion means on the basis of an odd/even address signal supplied to said memory.
Dependencies are inferred from the claim text.