US 6,211,745 B1 · Method and apparatus for digitally controlling the capacitance of an integrated circuit device using mos-field effect transistors

Abstract

A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or “binary” varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C1; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C2. The capacitance of the binary capacitor can be changed from C1 to C2 simply by changing the polarity of the applied D.C. voltage from a positive to a negative value. A plurality of binary capacitors are configured in a parallel arrangement to produce a digitally controlled capacitor. The digitally controlled capacitor can be used in any integrated circuit requiring a tightly controlled tuned network. One application is a voltage-controlled oscillator (VCO) wherein the center output frequency of the VCO is calibrated by digitally modifying the capacitance of the VCO's digitally controlled capacitor. A means for determining whether the VCO requires calibration and a means for calibrating the center output frequency of the VCO is presented.

Claims28

Dependent claims

A digital capacitance apparatus coupled to a predetermined number, N, of control signals, wherein the capacitance across the digital capacitance apparatus has at least 2N distinct values, the digital capacitance apparatus including:

a) N multiple capacitance level two terminal capacitors coupled in parallel, each multiple capacitance level capacitor having a plurality of steady-state capacitance levels,
b) wherein each multiple capacitance level capacitor is operatively coupled to an associated and corresponding one of N control signals, and wherein the steady-state capacitance level across each multiple capacitance level capacitor varies as a function of the corresponding control signal.

A frequency adjustable oscillator, the oscillator including:

a) at least one inductor;
b) a plurality of N multiple capacitance level two terminal capacitors coupled together in a parallel configuration, each multiple capacitance level capacitor having a plurality of steady-state capacitance levels, the N capacitors also coupled in parallel with the at least one inductor, wherein the steady-state capacitance level of each multiple capacitance level capacitor is controlled by an associated and corresponding control signal, and wherein the capacitance level measured across the plurality of N multiple capacitance level capacitors has at least 2N distinct capacitance values,
c) wherein each multiple capacitance level capacitor is operatively coupled to an associated and corresponding one of N control signals, wherein the steady-state capacitance level measured across each multiple capacitance level capacitor varies as a function of the corresponding control signal, and wherein the oscillation frequency of the oscillator varies as a function of the N control signals.

Dependencies are inferred from the claim text.

Method and apparatus for digitally controlling the capacitance of an integrated circuit device using mos-field effect transistors

Life of this patent

Method and apparatus for digitally controlling the capacitance of an integrated circuit device using mos-field effect transistors

Life of this patent

Abstract

Claims28