Lock detector for phase locked loops
AssigneeBroadcom Corporation
InventorsLoke Kun Tan, Farzad Etemadi, Denny Yuen, Shauhyarn Shaun Tsai
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AssigneeBroadcom Corporation
InventorsLoke Kun Tan, Farzad Etemadi, Denny Yuen, Shauhyarn Shaun Tsai
Estimating the term…
A detector circuit for determining whether synchronization lock has been optimally achieved in feedback-type control systems. The detector circuit evaluates an error signal developed by a phase/frequency detector and compares the absolute magnitude of the error signal to a first threshold signal corresponding to a magnitude metric. When the value of the error signal is less than the magnitude threshold value, an event signal initiates a time interval counter which continues counting so long as the error signal remains below the magnitude threshold value. The time interval counter continues until it counts to a second threshold value corresponding to a timing metric. At this point, synchronization lock is declared.
In a phase locked loop of the type including a phase detector configured to develop phase error signals for use by at least a loop filter in deriving control signals for an oscillator circuit, a detector circuit for evaluating phase error signals in order to determine whether a lock condition has been achieved, the detector circuit comprising:
In a phase locked loop of the type including a phase detector configured to develop phase error signals for use by at least a loop filter in deriving control signals for an oscillator circuit, a method for evaluating phase detector output so as to optimally determine when phase lock has been achieved the method comprising:
Dependencies are inferred from the claim text.