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US 6,211,714 B1Granted
System for Distributing Clocks
AssigneesSun Microsystems, Inc., Deog-Kyoon Jeong
InventorDeog-Kyoon Jeong
Life of this patent
Estimating the term…
Abstract
A system for converting between parallel data and serial data is described. In the system, individual bits of the parallel data are latched into individual registers. Each register is coupled to a corresponding AND gate which is also connected to receive phased clock signals. The output terminals of the AND gates are connected to an OR gate. Using the system, with appropriately phased clocks, the parallel data is converted into serial data.
Claims25
A system for distributing clock signals comprising:
- a plurality of conductors positioned adjacent one another to establish at least one exterior conductor and a set of interior conductors, wherein each interior conductor has neighboring conductors on two sides and each exterior conductor has a neighboring conductor on an interior side, each interior and exterior conductor carrying a separate clock signal;
- and
- a first additional conductor positioned on an exterior side of the exterior conductor and configured such that the exterior conductor is capacitively coupled to adjacent conductors by approximately the same capacitive coupling as an interior conductor to its adjacent conductors, wherein the first additional conductor carries a time-varying signal and is a nearest conductor on the exterior side of the exterior conductor.
A system for distributing clock signals comprising:
- a series of adjacent conductors including interior conductors and at least one exterior conductor, wherein each interior conductor has neighboring conductors on each side and each exterior conductor has a neighboring conductor on one side, each conductor carrying a separate clock signal, the separate clock signals forming a plurality of clock signals, at least one conductor carrying a clock signal having a substantially periodic waveform;
- and
- at least one additional conductor disposed on an exterior side of the exterior conductor and configured such that the exterior conductor is capacitively coupled to adjacent conductors by approximately the same capacitive coupling as an interior conductor to its adjacent conductors.
A system for distributing clock signals comprising:
- a plurality of conductors, each conductor carrying one of a plurality of periodic signals, each conductor having at least one neighboring conductor from among the plurality of conductors, a portion of each conductor being substantially parallel to portions of its neighboring conductors,
- wherein a phase of the periodic signal carried on each particular conductor differs from the phase of the periodic signal carried on each of the particular conductor's neighboring conductors to thereby reduce crosstalk effect from the neighboring conductors during signal transitions on the particular conductor.
An integrated circuit comprising:
- a plurality of conductors arranged to distribute a set of clock signals, wherein the plurality of conductors comprises a set of inside conductors and an outside conductor located at one edge and positioned adjacent to one of the inside conductors;
- and
- an exterior conductor positioned adjacent to the outside conductor and configured to carry no signal or a time varying signal, wherein the exterior conductor is configured such that the outside conductor and inside conductors are each capacitively coupled to adjacent conductors by approximately the same capacitive coupling.
An integrated circuit comprising:
- a plurality of conductors arranged to distribute a set of first signals, wherein the plurality of conductors comprises a set of inside conductors and an outside conductor located at an edge and positioned adjacent to one of the inside conductors;
- and
- an exterior conductor positioned adjacent to the outside conductor and configured such that the outside conductor is capacitively coupled to adjacent conductors by approximately the same capacitive coupling as an inside conductor to its adjacent conductors, and wherein the exterior conductor is further configured to carry no signal or a second signal that is one of the first signals.
Dependencies are inferred from the claim text.