Method for testing semiconductor device and semiconductor device with transistor circuit for marking

A method for testing a semiconductor device comprising the steps of:

• providing a semiconductor chip with a transistor circuit for marking;
• performing a functional test on the chip to determine whether the chip is defective;
• inputting a signal for causing latch-up to occur in said marking transistor circuit when the chip is determined as defective and damaging said marking transistor circuit to allow said marking transistor to be visually identified;
• wherein said marking transistor circuit is a CMOS transistor circuit and has a test signal terminal for inputting the signal for causing latch-up;
• and
• wherein said transistor circuit for marking includes:
• a P-type MOS transistor and an N-type MOS transistor connected in series between a power supply pad and a ground pad;
• a first inverter connected to the test signal terminal and having an output terminal connected to a drain of said N-type MOS transistor;
• and
• a second inverter into which an output signal of the first inverter is inputted and an output terminal of which is connected to a drain of said P-type MOS transistor.