Apparatus for preventing electrostatic discharge in an integrated circuit
AssigneeWinbond Electronics Corp.
InventorTa-Lee Yu
Life of this patent
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Abstract
An integrated circuit package includes a semiconductor chip, a plurality of wired pins, and at least one non-wired pin. The size of the non-wired pin is minimized, or the non-wired pin is eliminated, in order to increase the lead pin spacing. The increase in lead pin spacing prevents electrostatic discharge failure in an integrated circuit package due to electrostatic stressing of the non-wired pin.
Claims7
A lead frame for preventing electrostatic discharge failure in an integrated circuit package which includes a semiconductor chip, said lead frame comprising:
- a plurality of wired pins;
- and
- at least one non-wired pin formed such that no more than a tip thereof at an outermost portion remains.
A chip carrier for preventing electrostatic discharge failure in an integrated circuit package which includes a semiconductor chip, said chip carrier comprising:
- a plurality of wired traces;
- and
- at least one non-wired trace formed such that no more than a tip at an outermost portion remains.
Dependencies are inferred from the claim text.