Active pixel sensor with bootstrap amplification
AssigneeFoveon, Inc.
InventorsRichard B. Merrill, Richard F. Lyon
Life of this patent
Estimating the term…
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AssigneeFoveon, Inc.
InventorsRichard B. Merrill, Richard F. Lyon
Estimating the term…
In a first embodiment an active pixel sensor includes a photodiode for capturing photocharge, a reset transistor for resetting the photodiode to a reset potential, and a readout transistor, and in a second embodiment an active pixel sensor includes a photodiode for capturing photocharge, a reset transistor for resetting the photodiode to a reset potential, a transfer transistor for transferring captured photocharge, and a readout transistor. In both embodiments, the readout transistor has a drain that is coupled to a first supply voltage during integration of photocharge and a second supply voltage during readout of the photocharge. Accordingly, the sensitivity of an active pixel sensor is increased by increasing the fill factor, the noise an active pixel sensor is reduced by increasing the relative size of the readout transistor, and the gain is compressive as the relative light intensity in an active pixel sensor increases.
An active pixel sensor comprising:
A method of operating an active pixel sensor having a photosensor, a reset transistor, a readout transistor, and a row select transistor, said readout transistor having a gate coupled to said photosensor, a drain coupled to a switchable supply voltage, and a source, and said row select transistor having a gate coupled to a row select line, a drain coupled to said source of said readout transistor, and a source, comprising the steps of:
A method of operating an active pixel sensor having a photosensor, a reset transistor, a transfer transistor, a readout transistor, and a row select transistor, said transfer transistor having a first source/drain coupled to said photosensor, a gate coupled to a transfer line, and a second source/drain, said readout transistor having a gate coupled to said second source/drain of said transfer transistor, a drain coupled to a switchable supply voltage, and a source, and said row select transistor having a gate coupled to a row select line, a drain coupled to said source of said readout transistor, and a source, comprising the steps of:
Dependencies are inferred from the claim text.