Method and apparatus for performing process switching in multiprocessor computer systems

A computer system comprising:

• a storage device having storing therein a first and second routine;
• and
• a first processor coupled to said storage device including:
• a storage area to store a first and second piece of data,
• a first circuit to alter said first piece of data to indicate a grouping of registers has been written to in response to said processor writing to said grouping of registers, and
• a second circuit coupled to said storage area to cause an interrupt to execute said second routine in response to said processor attempting to touch said grouping of registers while said second piece of data indicates a prior state of said grouping of registers has not been loaded;
• said first processor, responsive to executing said first routine, to perform a process switch during which said processor stores in said storage device the current state of said grouping of registers only if said first piece of data indicates said grouping of registers has been written and to alter said first piece of data to indicate said grouping of registers has not been written;
• and
• said first processor, responsive executing said second routine, to load into said grouping of registers the prior state of said grouping of registers from said storage device into said grouping of registers and to alter said second piece of data to indicate said grouping of registers has been loaded.

A method comprising the computer implemented steps of:

• during a process switch by a first processor to a process,
• determining that execution of said process is not likely to cause said first processor to read or write to a particular grouping of registers in said first processor, and
• loading a prior processing state into registers of said first processor with the exception of at least the particular grouping of registers;
• and
• during execution of said process by said first processor, loading the prior processing state for said particular grouping of registers only if said process instructs said first processor to read from or write to said particular grouping of registers;
• and
• during a second process switch by the first processor, copying a current processing state from registers in said processor.

A method comprising the computer implemented steps of:

• during a process switch by a first processor to a process,
• loading a prior processing state into registers of said first processor with the exception of at least a particular grouping of registers,
• during execution of said process by said first processor, loading into the particular grouping of registers in said first processor the prior processing state for the particular grouping of registers in response to said process instructing said first processor to read or write to said grouping of registers;
• and
• during a process switch by the first processor away from the process,
• copying a current processing state from registers in said first processor with the exception of at least said particular grouping of registers, and
• copying the current processor state from said particular grouping of registers only if said particular grouping of registers was written to since the process switch by said first processor to said process.

A method comprising the computer implemented steps of:

• during a process switch by a first processor to a process,
• loading a prior processing state into registers of said first processor with the exception of any processing state associated with a particular grouping of registers,
• determining whether execution of said process is likely to read or write to the particular grouping of registers in said first processor,
• loading the prior processing state for said particular grouping of registers only if it was determined that said process is likely to cause said first processor to read or write to said particular grouping of registers,
• altering a first piece of data in a control register of said first processor to indicate whether said particular grouping of registers was loaded;
• and
• if during execution of said process by said first processor said first piece of data indicates said particular grouping of registers was not loaded and said process instructs said first processor to read from or write to said particular grouping of registers,
• interrupting execution of said process,
• loading the prior processing state for said particular grouping of registers,
• altering said first piece of data to indicate said particular grouping of registers was loaded, and
• resuming execution of said first process.