RAM data transmitting apparatus and method using a FIFO memory with three fullness flags
AssigneeSamsung Electronics Co., Ltd.
InventorKi-Hong Kim
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorKi-Hong Kim
Estimating the term…
A RAM data transmitting apparatus transmits data from a RAM to an external host via a first-in first-out (FIFO) memory having a given storage capacity. RAM data is sequentially written into the FIFO in response to the generation of a write enable signal. If the RAM data is written in a first area of the FIFO smaller than the FIFO storage area, a first flag is generated. If the RAM data is written in a second area of the FIFO (the second area being smaller than the storage capacity but larger than the first area), a second flag is generated. If no RAM data is written into or remains in the FIFO (the FIFO is empty), a third flag is generated. A controller is provided which generates the write enable signal from the time the first flag goes low until the second flag is generated, whereby the RAM data stored in the RAM is written in the first-in first-out memory. A data access circuit is provided to allow continuous accessing of the RAM data from the FIFO memory, beginning from the time the second flag is generated until the third flag is generated.
An apparatus for transmitting data comprising:
An apparatus for transmitting data from a random access memory (RAM) comprising:
A method of writing RAM data stored in a RAM into a first-in first-out memory having a storage capacity and if there is a request of an access from data access means, transmitting the RAM data written in said first-in first-out memory to said data access means, said method comprising the steps of:
Dependencies are inferred from the claim text.