Back to results
US 6,209,045 B1Granted
Data processor and data processing system
AssigneeHitachi, Ltd.
InventorsHironobu Hasegawa, Hiroyuki Sasaki, Masahiko Uraguchi
Life of this patent
Estimating the term…
Abstract
A data processor has a ROM that holds a boot program for causing the CPU to transfer a debug program from a serial interface circuit to a debug-use RAM area. When supplied externally with an SDI boot command, the serial interface circuit outputs an SDI interrupt request signal (SDI_boot) to an interrupt controller. The signal causes the CPU to execute the boot program. Debug operations are varied as per the contents of the downloaded debug program, and data exchanges upon debugging are carried out serially.
Claims4
A data processor comprising:
- a serial interface unit including a control signal terminal and a data input/output terminal;
- a memory unit connected to the serial interface unit and having a first area and a second area;
- and
- a processing unit;
- wherein when said serial interface unit receives a first control request signal at said control signal terminal, said serial interface unit receives a first program for debugging executed by the processing unit from said data input/output terminal,
- wherein said memory unit stores said first program to said second area and stores a second program which is to be subjected to a debugging operation by the first program to said first area, and
- wherein said processing unit branches a first predetermined address in the first area corresponding to receiving a second signal from said serial interface unit.
4 more elements
A data processing system comprising:
- a control unit;
- a data processor including:
- a serial interface unit for connecting to said control unit and having a control signal terminal and a data input/output terminal,
- a processing unit, and
- a memory unit including a first area and a second area;
- wherein said serial interface unit receives a first control signal at said control signal terminal from said control unit, receives first data corresponding to a first program at said data input/output terminal, the first program being used for debugging, and sends said first data to said second area in the memory unit;
- wherein said memory unit stores said first data and stores second data after storing said first data, said second data being executable and usable by the processing unit;
- wherein said processing unit executes said second data and stores a third data to said memory unit controlled by said first data;
- and
- wherein said serial interface unit receives a second control signal from said control unit to said control signal terminal, receives said third data from said memory unit and sends said third data from said data input/output terminal to said control unit.
7 more elements
Dependencies are inferred from the claim text.