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US 6,209,017 B1Granted
High speed digital signal processor
AssigneeLG Electronics Inc.
InventorsIl Taek Lim, Jun Ho Bahn, Kyu Seok Kim
Life of this patent
Estimating the term…
Abstract
A digital signal processor having an ALU and accumulating register small in bit number. The digital signal processor adds r-bit rounding bits to an N-bit data(wherein r<N) and adds g-bit guard bits to the high-order bits of the data using bit alignment units each being implemented with a wiring, when N bit data is processed. The data added by the guard bits and the rounding bits is operated by means of the accumulator. The operated data is selectively rounded by a rounding processor. Also, the selectively rounded data is selectively saturated by a saturation processor.
Claims24
A digital signal processor, comprising:
- data input means for receiving a N-bit data;
- rounding bit adding means for adding r-bit rounding bits to the N-bit data from the data input means, wherein r is smaller than N;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the rounding bit adding means;
- means for performing a prescribed operation based on the data from the guard bit adding means;
- and
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes, for the data from the prescribed operation means.
3 more elements
A digital signal processor, comprising:
- data input means for receiving a N-bit data;
- rounding bit adding means for adding r-bit rounding bits to the N-bit data from the data input means, wherein r is smaller than N;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the rounding bit adding means;
- operational logic means for performing a prescribed operation based on the data from the guard bit adding means and the data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the operational logic means;
- means for scaling the data from the guard bit adding means;
- selecting means for selectively transferring the data from the scaling means and the data from the guard bit adding means to the memory;
- and
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes, for the data memory.
6 more elements
A digital signal processor, comprising:
- data input means for receiving a N-bit data;
- rounding bit adding means for adding r-bit rounding bits to the N-bit data from the data input means, wherein r is smaller than N;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the rounding bit means;
- means for storing a multiplied value of two N-bit data;
- wiring aligning/guard bit adding means for deriving a (g+N+r)-bit data from the multiplied value from the storing means;
- means for performing a prescribed operation based on two accumulated values of data from the wiring aligning/guard bit adding means;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes, for the data from a memory.
4 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means to the left of a (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the alignment unit through the (N+r)-bit bus;
- and
- deriving means for deriving only the high-order N bits from the data from the prescribed operation means.
2 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means to the left of a (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the alignment unit through the (N+r)-bit bus;
- and
- deriving means for deriving only the low-order N bits from the data from the prescribed operation means.
2 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- a first alignment unit for aligning the N-bit data from the data input means to the left of first (N+r)-bit bus;
- a second alignment unit for aligning the N-bit data from the data input means to the right of second (N+r)-bit bus;
- first selecting means for selecting the data from any one of the first and second alignment units;
- means for performing a prescribed operation based on the data from the first selecting means;
- first deriving means for deriving only the high-order N bits from the data from the prescribed operation means;
- second deriving means for deriving only the low-order N bits from the data from the prescribed operation means;
- and
- second selecting means for selecting the data from any one of the first and second driving means.
6 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means from the data input means to the left of a (N+r)-bit bus;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the alignment unit;
- means for performing a prescribed operation based on the data from the guard bit adding means;
- deriving means for deriving low-order N bits beginning at the high-order (g+1) numbered bit from the data from the prescribed operation means;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the prescribed operation means;
- and
- selecting means for selecting the data from any one of the deriving means and the rounding/saturating means.
5 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means from the data input means to the left of a (N+r)-bit bus;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the alignment unit;
- means for performing a prescribed operation based on the data from the guard bit adding means;
- deriving means for deriving low-order N bits among the data from the prescribed operation means;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the prescribed operation means;
- and
- selecting means for selecting the data from any one of the deriving means and the rounding/saturating means.
5 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- a first alignment unit for aligning the N-bit data from the data input means to the left of first (N+r)-bit bus;
- a second alignment unit for aligning the N-bit data from the data input means to the right of second (N+r)-bit bus;
- first selecting means for selecting the data from any one of the first and second (N+r)-bit buses;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the first selecting means;
- means for performing a prescribed operation based on the data from the guard bit adding means;
- first deriving means for deriving the high-order N bits from the data from the prescribed operation means;
- second deriving means for deriving the low-order N bits beginning at the high-order (g+1) numbered bit from the data from the prescribed operation means;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the prescribed operation means;
- and
- second selecting means for selecting the data from any one of the first and second deriving means and the rounding/saturating means.
8 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means from the data input means to the left of a (N+r)-bit bus;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the alignment unit through the (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the guard bit adding means and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the guard bit adding means;
- first selecting means for selectively transferring the data from the scaling means and the data from the operating means to the memory;
- means for deriving the low-order N bits beginning at the high-order (g+1) numbered bit from the data from the prescribed operation means;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the memory;
- and
- second selecting means for selecting the data from any one of the deriving means and the rounding/saturating means.
8 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the data input means from the data input means to the right of a (N+r)-bit bus;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the guard bit adding means and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the guard bit adding means;
- first selecting means for selectively transferring the data from the scaling means and the data from the prescribed operation means to the memory;
- means for deriving the low-order N bits from the data from the memory;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the memory;
- and
- second selecting means for selecting the data from any one of the deriving means and the rounding/saturating means.
8 more elements
A digital signal processor, comprising:
- data input means for receiving an N-bit data;
- a first alignment unit for aligning the N-bit data from the data input means from the data input means to the left of first (N+r)-bit bus;
- a second alignment unit for aligning the N-bit data from the data input means to the right of second (N+r)-bit bus;
- first selecting means for selecting the data from any one of the first and second (N+r)-bit buses;
- guard bit adding means for adding g-bit guard bits to the high-order bits of the data from the first selecting means;
- means for performing a prescribed operation based on the data from the guard bit adding means and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the guard bit adding means;
- second selecting means for selectively transferring the data from the scaling means and the data from the prescribed operation means to the memory;
- first deriving means for deriving the low-order N bits from the data from the memory;
- second deriving means for deriving the high-order N bits beginning at the high-order (g+1) numbered bit from the data from the memory;
- rounding/saturation means for making a rounding process, a saturation process and a combined process including the rounding and saturation processes for the data from the memory;
- and
- third selecting means for selecting the data from any one of the first and second deriving means and the rounding/saturating means.
11 more elements
A digital signal processor, comprising:
- input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the input means to the left of a (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the (N+r)-bit bus and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the alignment unit;
- selecting means for selectively transferring the data from the scaling means and the data from the prescribed operation means to the memory;
- means for deriving only the high-order N bits from the data from the memory.
4 more elements
A digital signal processor, comprising:
- input means for receiving an N-bit data;
- an alignment unit for aligning the N-bit data from the input means to the right of a (N+r)-bit bus;
- means for performing a prescribed operation based on the data from the (N+r)-bit bus and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the (N+r)-bit bus;
- selecting means for selectively transferring the data from the scaling means and the data from the prescribed operation means to the memory;
- means for deriving only the low-order N bits from the data from the memory.
4 more elements
A digital signal processor, comprising:
- input means for receiving an N-bit data;
- a first alignment unit for aligning the N-bit data from the input means to the left of first (N+r)-bit bus;
- a second alignment unit for aligning the N-bit data from the input means to the right of second (N+r)-bit bus;
- first selecting means for selecting the data from any one of the first and second (N+r)-bit buses;
- means for performing a prescribed operation based on the data from the first selecting means and a data from a feedback loop;
- a memory connected to the feedback loop for temporarily storing the data from the prescribed operation means;
- means for scaling the data from the first selecting means;
- second selecting means for selectively transferring the data from the scaling means and the data from the prescribed operation means to the memory;
- first deriving means for deriving only the high-order N bits from the data from the memory;
- second deriving means for deriving only the low-order N bits from the data from the memory;
- and
- third selecting means for selecting the data from any one of the first and second deriving means.
9 more elements
Dependencies are inferred from the claim text.