Efficient implementation of a filter

Abstract

A Finite Impulse Response (FIR) filter is implemented in software on a general purpose processor in a manner which reduces the number of memory accesses as compared to conventional methods. In particular, an efficient implementation for a general purpose processor having a substantial number of registers includes inner and outer loop code which together make K ⁡ [ ( L 1 + L 2 L 1 ⁢ L 2 ) ⁢ N + L 2 L 1 + 1 ] memory accesses and KN multiply-accumulates, where L1 is the number of output vector elements computed during each pass through the outer loop and where L2 is the number of taps per output vector element computed during each pass through the inner loop. The efficient implementation exploits L1+2L2 general purpose registers. For an embodiment in which L1=L2=8, inner and outer loop code make K ⁡ ( N 4 + 2 ) memory accesses, which for filter implementations with large numbers of taps, approaches a 4× reduction in the number of memory accesses as compared to conventional methods.

Dependencies are inferred from the claim text.