Method in an integrated circuit (IC) manufacturing process for identifying and redirecting IC's mis-processed during their manufacture

A method of manufacturing integrated circuit devices from semiconductor wafers, the method comprising:

• providing a plurality of semiconductor wafers;
• fabricating a plurality of integrated circuit devices on each wafer of the plurality of semiconductor wafers;
• causing each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers to store a substantially unique identification code;
• storing data and the identification code of said each integrated circuit device of the plurality of integrated circuit devices indicating a manufacturing process flow for said each integrated circuit device of the plurality of integrated circuit devices;
• separating each integrated circuit device of the integrated circuit devices on each wafer of the plurality of semiconductor wafers to form an integrated circuit device of a plurality of integrated circuit devices;
• assembling said each integrated circuit device of the plurality of integrated circuit devices into an integrated circuit device assembly;
• reading the identification code of said each integrated circuit device of the integrated circuit device assemblies;
• accessing the data stored and the identification code associated with said each integrated circuit device of the integrated circuit device assemblies;
• evaluating the data accessed for said each integrated circuit device of the integrated circuit device assemblies identifying any integrated circuit devices having undergone a manufacturing process flow different from the indicated manufacturing process flow of their stored data;
• subjecting to further processing an integrated circuit device identified as having undergone a manufacturing process flow different from the indicated manufacturing process flow of its stored data;
• and
• back-end testing integrated circuit devices not subjected to further processing.

A method of manufacturing Multi-Chip Modules from semiconductor wafers, the method comprising:

• providing a plurality of integrated circuit devices on each wafer of a plurality of semiconductor wafers;
• causing each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers to store a substantially unique identification code;
• storing data and the identification code of said each integrated circuit device of the plurality of integrated circuit devices indicating a desired manufacturing process flow for said each integrated circuit device of the plurality of integrated circuit devices;
• separating said each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers from the wafer to form one of a plurality of integrated circuit devices;
• assembling one or more integrated circuit devices of the plurality of integrated circuit devices into each of a plurality of multi-chip modules;
• reading the identification code of said each integrated circuit device of the plurality of integrated circuit devices in said each of the plurality of multi-chip modules;
• accessing the data stored and the identification code of said each integrated circuit device of the plurality of integrated circuit devices in said each of the plurality of multi-chip modules;
• evaluating the data accessed for said each integrated circuit device of the plurality of integrated circuit devices in said each of the plurality of multi-chip modules identifying any multi-chip modules having integrated circuit devices having undergone a manufacturing process flow that is different from the desired manufacturing process flow;
• redirecting any multi-chip modules identified as having integrated circuit devices having undergone a manufacturing process flow that is different from the desired manufacturing process flow;
• and
• back-end testing any non-redirected multi-chip modules.

A method of manufacturing integrated circuit devices from semiconductor wafers the method comprising:

• providing a plurality of integrated circuit devices on each wafer of a plurality of semiconductor wafers;
• electronically probing each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers to identify good and defective integrated circuit devices on said each wafer of the plurality of semiconductor wafers;
• programming said each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers to store a unique fuse identification;
• storing an electronic wafer map for said each wafer of the plurality of semiconductor wafers that identifies locations of good and defective integrated circuit devices on the wafer associating each integrated circuit device on the wafer with its fuse identification;
• sawing said each integrated circuit device of the plurality of integrated circuit devices on said each wafer of the plurality of semiconductor wafers from its wafer to form one of a plurality of discrete integrated circuit devices;
• automatically picking said each integrated circuit device of the plurality of integrated circuit devices from the wafer;
• placing said each integrated circuit device of the plurality of integrated circuit devices onto an epoxy coated bonding site of one of a plurality of lead frames;
• curing the epoxy on the bonding site of said each lead frame of the plurality of lead frames;
• wire bonding said each integrated circuit device of the plurality of integrated circuit devices to an associated lead frame;
• injection molding said each integrated circuit device of the plurality of integrated circuit devices and the associated lead frame forming one of a plurality of integrated circuit device packages, each package having projecting leads;
• de-flashing the projecting leads of said each integrated circuit device package of the plurality of integrated circuit device packages;
• curing said each integrated circuit device package of the plurality of integrated circuit device packages;
• electroplating the projecting leads of said each integrated circuit device package of the plurality of integrated circuit device packages;
• singulating said each integrated circuit device package of the plurality of integrated circuit device packages into one of a plurality of discrete integrated circuit devices;
• testing said each integrated circuit device of the plurality of integrated circuit devices for opens and shorts;
• electrically retrieving the fuse identification associated with said each integrated circuit device of the plurality of integrated circuit devices;
• accessing the wafer map stored in association with the fuse identification associated with each integrated circuit device of the plurality of integrated circuit devices;
• evaluating the wafer map accessed for said each integrated circuit device of the plurality of integrated circuit devices identifying any defective integrated circuit device and any good integrated circuit device;
• discarding any integrated circuit device identified as a defective integrated circuit device;
• and
• back-end testing any integrated circuit device identified as a good integrated circuit device.