US 6,208,703 B1 · First-in-first-out synchronizer

Abstract

A one stage first-in-first-out synchronizer includes a producer side and a consumer side. The producer side includes a first write buffer, a not full output, a write input, a second write buffer and a write clock input. The first write buffer stores a write pointer. The not full output indicates whether new data may be written. The write input is asserted to write data. The second write buffer receives as input a read pointer. The write clock input is used to provide a clock signal to the first write buffer and the second write buffer. The consumer side includes a first read buffer, a not empty output, a read input, a second read buffer, and a read clock input. The first read buffer stores the read pointer. The not empty output indicates whether stored data may be read. The read input is asserted to read data. The second read buffer receives as input the write pointer. The read clock input is used to provide a clock signal to the first write buffer and the second write buffer.

Claims20

Dependent claims

A one stage first-in-first-out synchronizer, comprising:

a first write flip-flop which generates a write pointer;
a first read flip-flop which generates a read pointer;
a second write flip-flop, which receives as input the read pointer;
a second read flip-flop, which receives as input the write pointer;
a write clock input which provides a write clock signal to the first write flip-flop and the second write flip-flop;
a write input;
a not full output;
first write logic gating means, for generating the not full output from the write pointer and an output of the second write flip-flop;
second write logic gating means for generating an input to the first write flip-flop from the write input and the not full output;
a read clock input which provides a read clock signal to the first read flip-flop and the second read flip-flop;
a read input;
a not empty output;
first read logic gating means, for generating the not empty output from the read pointer and an output of the second read flip-flop;
and,
second read logic gating means for generating an input to the first read flip-flop from the read input and the not empty output.

12 more elements

A one stage first-in-first-out synchronizer, comprising:

a first write flip-flop which generates a write pointer;
a first read flip-flop which generates a read pointer;
a second write flip-flop, which receives as input the read pointer;
a third write flip-flop, having an input coupled to an output of the second write flip-flop;
a second read flip-flop, which receives as input the write pointer;
a third read flip-flop, having an input coupled to an output of the second read flip-flop;
a write clock input which provides a write clock signal to the first write flip-flop, the second write flip-flop and the third write flip-flop;
a write input;
a not full output;
first write logic gating means, for generating the not full output from the write pointer and an output of the third write flip-flop;
second write logic gating means for generating an input to the first write flip-flop from the write input and the not full output;
a read clock input which provides a read clock signal to the first read flip-flop, the second read flip-flop and the third read flip-flop;
a read input;
a not empty output;
first read logic gating means, for generating the not empty output from the read pointer and an output of the third read flip-flop;
and,
second read logic gating means for generating an input to the first read flip-flop from the read input and the not empty output.

14 more elements

A one stage first-in-first-out synchronizer, comprising:

a write input;
a not full output;
a read input;
a not empty output;
a first write flip-flop which generates a write pointer;
a first read flip-flop which generates a read pointer;
a second write flip-flop, which receives as input the read pointer;
a third write flip-flop, having an output coupled to the not full output;
a second read flip-flop, which receives as input the write pointer;
a third read flip-flop, having an output coupled to the not empty output;
a write clock input which provides a write clock signal to the first write flip-flop, the second write flip-flop and the third write flip-flop;
first write logic gating means, for generating an input to the third output from an input to the first write flip-flop and an output of the second write flip-flop;
second write logic gating means for generating an input to the first write flip-flop from the write input the not full output and the write pointer;
a read clock input which provides a read clock signal to the first read flip-flop, the second read flip-flop and the third read flip-flop;
first read logic gating means, for generating an input to the third flip-flop from an input of the first flip-flop and an output of the second read flip-flop;
and,
second read logic gating means for generating an input to the first read flip-flop from the read input, the not empty output and the read pointer.

14 more elements

Dependencies are inferred from the claim text.

First-in-first-out synchronizer

Life of this patent

First-in-first-out synchronizer

Life of this patent

Abstract

Claims20