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US 6,208,576 B1Granted
Synchronous semiconductor memory device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorNobuhiro Tsuda
Life of this patent
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Abstract
The synchronous semiconductor memory device related to the present invention is a synchronous semiconductor memory device in which for one data read signal, the respective data corresponding to a plurality of addresses are sequentially read out from a memory cell in synchronism with an external clock signal, and which comprises a control circuit which executes control according to an externally inputted control signal so as to output only the data corresponding to one address from the memory cell for one data read signal.
Claims16
A synchronous semiconductor memory device comprising:
- a data processor circuit which sequentially reads out from or writes to a memory cell respective data corresponding to a plurality of addresses in synchronism with a clock signal for one read signal or one write signal, and
- a control circuit, by which control can be executed according to an external control signal which externally inputted so that only the data corresponding to one address is outputted from or inputted to said memory cell for said one read signal or said one write signal.
Dependencies are inferred from the claim text.