Three dimensional structure memory
OwnerGlenn J. Leedyinventor
Life of this patent
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Abstract
A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 μm in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density interlayer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
Claims28
A method of information processing using a stacked integrated circuit memory including a memory controller layer and multiple memory layers, the method comprising the steps of:
- initiating a memory access;
- and
- during the memory access, independently routing data vertically between the memory controller layer and selected storage locations within each of many memory blocks on a single memory layer, wherein said routing occurs through a dense output array interior to the stacked integrated circuit memory;
- and
- wherein during a single memory access cycle, many bytes of data are routed from the selected storage locations to the memory controller layer.
A method of information processing using a stacked integrated circuit memory including a logic layer and multiple memory layers, the method comprising the steps of:
- initiating a memory access;
- and
- during the memory access, independently routing data vertically between the logic layer and selected storage locations within each of many memory blocks on a single memory layer, wherein said routing occurs through a dense output array interior to the stacked integrated circuit memory;
- and
- wherein during a single memory access cycle, many bytes of data are routed from the selected storage locations to the logic layer.
Dependencies are inferred from the claim text.