Electrode substrate resistant to wire breakage for an active matrix display device
AssigneeKabushiki Kaisha Toshiba
InventorsTadashi Ejiri, Ryuji Tada
Life of this patent
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Abstract
An electrode substrate comprising a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer. The electrode substrate further comprises a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer. The boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other
Claims22
An electrode substrate comprising:
- a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer;
- and
- a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;
- wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other.
An electrode substrate comprising a signal line, wherein the signal line comprises:
- a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer;
- and
- a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;
- wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other.
An electrode substrate comprising:
- a first conductive layer having a boundary region separating a first wiring pattern and a second wiring pattern of the first conductive layer;
- and
- a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having an another boundary region separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;
- wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other;
- and
- wherein the formation of said electrode substrate comprises:
- depositing a first conductive film;
- applying a first photoresist to said deposited first conductive film;
- exposing a first area of the applied first photoresist using a first mask pattern;
- exposing a second area of the applied first photoresist using a second mask pattern, wherein a part of the exposed second area of the applied first photoresist overlaps a part of the exposed first area of the applied first photoresist;
- developing said exposed first photoresist to form a first resist pattern;
- patterning said first conductive film in accordance with said first resist pattern to form a first conductive layer including a first wiring pattern, a second wiring pattern, and a boundary region;
- depositing a second conductive film;
- applying a second photoresist to said deposited second conductive film;
- exposing a third area of the applied second photoresist using a third mask pattern;
- exposing a fourth area of the applied second photoresist using a fourth mask pattern, wherein a part of the exposed fourth area of the applied second photoresist overlaps a part of the exposed third area of the applied second photoresist;
- developing said exposed second photoresist to form a second resist pattern;
- patterning said second conductive film in accordance with said second resist pattern to form a second conductive layer including a third wiring pattern, a fourth wiring pattern, and another boundary region.
Dependencies are inferred from the claim text.