Phase-locked-loop pulse-width modulation system
OwnerMikko J. Nasilainventor
Life of this patent
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Abstract
A phase-locked loop applied as a phase modulator using an external analog control signal whereby a single-ended pulse-width modulated digital signal may be derived from the phase detector output, and two phase modulated square-wave digital signals may be derived from a reference oscillator and the feedback voltage controlled oscillator. The pulse width modulation and/or phase modulation in power applications can be achieved with far greater speed, precision, simplicity and economy than by existing techniques.
Claims17
A phase-locked-loop circuit configured as a phase modulator to generate a pulse width modulated signal comprising:
- a reference oscillator which generates a reference oscillator signal;
- a voltage controlled oscillator which generates a voltage controlled oscillator signal;
- a phase detector connected to said reference oscillator and said voltage controlled oscillator, wherein said phase detector compares a phase relationship of said reference oscillator signal and said voltage controlled oscillator signal, and wherein said phase detector generates said pulse width modulated signal representing said phase relationship;
- a power transistor controlled by said pulse width modulated signal to produce a power pulse width modulated signal;
- a power low-pass filter connected to said power pulse width modulated signal, wherein said power low-pass filter converts said power pulse width modulated signal to an average output voltage;
- and
- a summing node connected to said power low-pass filter, wherein said summing node generates a difference signal between said average output voltage and an analog modulation input, and wherein said difference signal is fedback to said voltage controlled oscillator.
A phase-locked-loop circuit configured as a phase modulator to generate two phase modulated signals comprising:
- a reference oscillator which generates a reference oscillator signal;
- a voltage controlled oscillator which generates a voltage controlled oscillator signal;
- a plurality of power transistors, wherein a first set of power transistors is controlled by said reference oscillator, and a second set of power transistors is controlled by said voltage controlled oscillator;
- an output power means, wherein a phase modulation between said first and second set of power transistors translates into a power pulse width modulated signal when coupled through said output power means;
- a power low-pass filter connected through a rectifier to said output power means, wherein said power low-pass filter converts said power pulse width modulated signal to an average output voltage;
- and
- a summing node connected to said power low-pass filter, wherein said summing node generates a difference signal between said average output voltage and an analog modulation input, and wherein said difference signal is fedback to said voltage controlled oscillator.
A phase-locked-loop process to generate a pulse width modulated signal comprising the steps of:
- generating a reference oscillator signal;
- generating a voltage controlled oscillator signal;
- comparing a phase relationship of said reference oscillator signal and said voltage controlled oscillator signal, and generating said pulse width modulated signal representing said phase relationship;
- controlling said pulse width modulated signal to produce a power pulse width modulated signal;
- filtering said power pulse width modulated signal and converting said power pulse width modulated signal to an average output voltage;
- generating a difference signal between said average output voltage and an analog modulation input;
- and
- feeding back said difference signal to said voltage controlled oscillator.
Dependencies are inferred from the claim text.