Output buffer having immediate onset of gentle state transition

An integrated circuit having an output buffer circuit for driving voltage state transitions of a transmission line, the output buffer circuit comprising:

• (a) an output transistor having a gate terminal for controlling an output voltage of the output transistor which is applied at an output terminal to the transmission line, wherein a voltage state transition comprises changing the output voltage from a first state voltage to a second state voltage, wherein a voltage state transition comprises one of a high-to-low and a low-to-high voltage state transition;
• (b) an impulse current driver for providing an impulse current for injecting charge into the gate terminal during an impulse phase at the beginning of the voltage state transition to rapidly bring the output transistor through its dead zone to the threshold of its active region, wherein the impulse current driver comprises a turn-on high-impulse current source for injecting charge into the gate terminal during the impulse phase at the beginning of a high-to-low voltage state transition and a turn-off high-impulse current sink for injecting charge into the gate terminal during the impulse phase at the beginning of a low-to-high voltage state transition;
• and
• (c) a slewing current driver for providing a slewing current to the gate terminal after the impulse phase, wherein the slewing current is comparatively limited with respect to the impulse current so as to cause the output transistor to complete a substantially smooth voltage state transition, wherein the slewing current driver comprises a turn-on gentle slewing current source for providing the slewing current to the gate terminal after the impulse phase of a high-to-low voltage state transition and a turn-off gentle slewing current sink for providing the comparatively limited current to the gate terminal after the impulse phase of a low-to-high voltage state transition.

An integrated circuit having an output buffer circuit for driving voltage state transitions of a transmission line, the output buffer circuit comprising:

• (a) an output transistor having a gate terminal for controlling an output voltage of the output transistor which is applied at an output terminal to the transmission line, wherein a voltage state transition comprises changing the output voltage from a first state voltage to a second state voltage;
• (b) an impulse current driver for providing an impulse current for injecting charge into the gate terminal during an impulse phase at the beginning of the voltage state transition to rapidly bring the output transistor through its dead zone to the threshold of its active region;
• (c) a slewing current driver for providing a slewing current to the gate terminal after the impulse phase, wherein the stewing current is comparatively limited with respect to the impulse current so as to cause the output transistor to complete a substantially smooth voltage state transition;
• and
• (d) an output voltage transition onset detector for providing an impulse termination signal to cause the impulse phase to end so that the impulse current driver stops injecting charge into the gate terminal when the output transistor is brought through its dead zone to the threshold of its active region.