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US 6,208,018 B1Granted
Piggyback multiple dice assembly
AssigneeMicron Technology, Inc.
InventorsManny Kin F. Ma, Jeffrey D. Bruce
Life of this patent
Estimating the term…
Abstract
An assembly for upgrading or remediating semiconductor devices utilizing a remediation, adaptation, modification or upgrade chip in a piggyback configuration with a primary bare chip to achieve an upgrade, modification or adaptation of the primary chip or remedy a design or fabrication problem with the primary chip.
Claims21
A semiconductor die assembly comprising:
- a primary die having integrated circuitry, said integrated circuitry exhibiting at least one operational characteristic;
- and
- at least one patch die having integrated circuitry, said at least one patch die differing in function from said primary die for altering said at least one operational characteristic of said primary die, said at least one patch die mounted on and in electrical communication with said primary die.
A semiconductor die assembly comprising:
- a primary die having integrated circuitry, said integrated circuitry exhibiting at least one operational characteristic;
- a first patch die having integrated circuitry, said first patch die differing in function from said primary die for altering said at least one operational characteristic of said primary die;
- a second patch die having integrated circuitry, said second patch die differing in function from said primary die for altering said at least one operational characteristic of said primary die;
- and
- wherein at least one of said first patch die and said second patch die is attached to and in electrical communication with said primary die.
2 more elements
A semiconductor die assembly comprising:
- a patch die having integrated circuitry for receiving a first signal exhibiting at least one operational characteristic and altering said at least one operational characteristic of said first signal to generate a second signal which differs from said first signal;
- and
- a primary die having said patch die mounted thereto and having integrated circuitry for receiving said second signal.
A semiconductor die assembly comprising:
- a primary die having integrated circuitry which generates a first signal exhibiting at least one operational characteristic;
- and
- a patch die mounted to said primary die and having integrated circuitry for receiving said first signal and altering said at least one operational characteristic of said first signal to generate a second signal which differs from said first signal.
Dependencies are inferred from the claim text.