Layout method of a semiconductor device
AssigneeFujitsu Limited
InventorsHiroshi Miyazaki, Kouji Tsunetou, Toru Osajima
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes multi-pin I/O buffers. The I/O buffers are located near an I/O pad area of the device. The multi-pin I/O buffers include multiple, generally L-shaped terminals that are connected to pads in the I/O pad area with wirings. The terminals of the I/O buffers include a horizontal terminal section and a vertical terminal section. The horizontal terminal sections extend in a width direction from a corner of the buffer toward a middle point of a side of the buffer, and the vertical terminal section extends in a length direction from the corner of the terminal toward a middle point of a side of the buffer. The wirings may also be generally L-shaped.
Claims18
In a semiconductor device having a plurality of pads and a plurality of I/O buffers, a method of laying out inter-I/O-pad wirings between the pads and the I/O buffers comprising steps of:
- arranging the plurality of I/O buffers in an I/O frame, wherein the plurality of I/O buffers includes a two pin I/O buffer having two I/O terminals that corresponds to two of the plurality of pads;
- arranging the plurality of pads in a pad region near the I/O frame;
- arranging the two I/O terminals that correspond to the two pads in the two pin I/O buffer, wherein each of the I/O terminals includes a generally horizontal terminal extending in the width direction of the two pin I/O buffer near the end of the two pin I/O buffer opposed to the pads and a vertical terminal extending in the lengthwise direction of the I/O buffer;
- and
- forming two inter-I/O-pad wirings extending toward and contacting the two pads, respectively, from one of the horizontal terminals and the vertical terminals thereof in accordance with a spacing of the two pads, respectively.
A semiconductor device, comprising:
- a plurality of pads;
- a plurality of I/O buffers including two pin I/O buffers that correspond to two pads;
- a plurality of I/O terminals including two I/O terminals arranged in the two pin I/O buffer corresponding to the two pads, wherein each of the two I/O terminals includes a horizontal terminal extending in the width direction of the two pin I/O buffer near the end of the two pin I/O buffer opposed to the pads and a vertical terminal extending in the lengthwise direction of the I/O buffer;
- and
- a plurality of inter-I/O-pad wirings including two inter-I/O-pad wirings extending toward the pads from one of the horizontal terminals and the vertical terminals in accordance with a spacing of the two pads.
A generally rectangular shaped multi-pin I/O buffer, comprising:
- a first I/O terminal located near a first corner of the buffer;
- and
- a second I/O terminal located near a second corner of the buffer adjacent to the first corner, wherein the first and second corners are on a side of the I/O buffer opposing a pad area of a semiconductor device, wherein each of the first and second I/O terminals includes a horizontal terminal section and a vertical terminal section, the horizontal terminal sections extending in a width direction from the corner in which the terminal is located toward a middle point of a side of the buffer, and the vertical terminal section extending in a length direction from the corner in which the terminal is located toward a middle point of a side of the buffer.
Dependencies are inferred from the claim text.