Method of manufacturing integrated circuit devices
AssigneeLucent Technologies Inc.
InventorJohn Aaron Mucha
Life of this patent
Estimating the term…
Abstract
A method for manufacturing integrated circuit apparatuses; particularly, 1) a method for removing barrier material that lies between copper conductors in damascene interconnections, and 2) a method for removing a thin layer of silicon nitride material that has been intentionally un-etched during the formation of trenches and vias in damascene interconnect dielectric and thereby not exposing copper metal.
Claims35
A method of manufacturing an integrated circuit comprising:
- a. providing an apparatus having a plurality ofexposed metal-conducting regions adjacent to a plurality of dielectric regions, covered at least partially with a barrier material;
- b. subjecting said apparatus to a reducing gas to reduce metal oxide on said metal-conducting regions to metal;
- c. contacting said barrier material with XeF2 to remove selected portions of said barrier material;
- and
- d. exposing said apparatus to a reducing gas to transform residual metal oxide and fluoride to metal at contacted surfaces.
A method of manufacturing an integrated circuit comprising:
- a. providing an apparatus having a plurality of exposed metal-conducting regions and a plurality of dielectric regions, covered at least partially with a barrier material, wherein said dielectric regions are comprised of a material selected from the group consisting of SiN and SiO2, and wherein said barrier material comprises a material selected from the group consisting of tantalum silicon nitride, titanium silicon nitride, tungsten silicon nitride and mixtures thereof;
- b. polishing selected portions of said barrier material, leaving residual barrier contamination;
- c. placing said apparatus in a chamber;
- d. charging said chamber with a gas selected from the group consisting of inter-halogen gas, rare-gas halide gas, and mixtures thereof;
- and
- e. etching said residual barrier contamination on said apparatus.
A method of manufacturing an integrated circuit comprising:
- a. providing an apparatus having a surface comprising areas of SiN with underlying copper;
- b. etching selected portions of said areas of SiN in a plasma until a thickness of less than 200 ÅA of SiN remains;
- c. etching said SiN with ClF3 at a temperature between about 20° C. and 200° C. on said apparatus to expose said copper;
- and
- d. exposing said apparatus to a compound selected from the group consisting of plasma containing hydrogen atoms, H2SO4 solution, and mixtures thereof to transform residual metal oxide and fluoride to metal at contacted surfaces.
A method of manufacturing an integrated circuit apparatus comprising:
- a. providing an apparatus comprising a substrate having a metal-conducting region deposited thereon, an SiN layer deposited above said metal-conducting region, and a dielectric region, having a via formed therein, deposited on said SiN layer, wherein a portion of said SIN layer below said via has a thickness less than about 200 ÅA;
- b. contacting said SiN layer with a gas selected from the group consisting of inter-halogen gas, rare-gas halide gas, and mixtures thereof to remove said SiN layer and expose said metal-conducting region, thereby avoiding subsequent deposition ofmetal from said metal-conducting region on portions of said dielectric region and preventing electrical leakage in said apparatus;
- and
- c. exposing said apparatus to a reducing gas to transform residual metal oxide and fluoride to metal at contacted surfaces.
Dependencies are inferred from the claim text.