Method of fabricating a semiconductor insulation layer and a semiconductor component containing the semiconductor insulation layer
AssigneeSiemens Aktiengesellschaft
InventorKarlheinz Müller
Life of this patent
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Abstract
The invention defines a method for fabricating a semiconductor insulation layer: A semiconductor substrate is first provided; an insulation layer is applied by way of region-by-region or whole-area application to the semiconductor substrate; impurity ions are selectively implanted into at least one predetermined zone of the insulation layer; then the insulation layer is selectively etched, and the insulation layer is thereby patterned in accordance with the zone or zones of the selectively implanted impurity ions. Likewise, the present invention provides a method for fabricating a semiconductor component containing this semiconductor insulation layer.
Claims9
A method of fabricating a semiconductor component with a semiconductor insulation layer, which comprises the following steps:
- providing a semiconductor substrate;
- forming a whole-area insulation layer on the semiconductor substrate with a predetermined thickness;
- forming a first mask on the insulation layer and defining a first predetermined zone;
- selectively implanting impurity ions into the first predetermined zone of the insulation layer defined by the first mask, and thereby selecting an implantation profile in accordance with an etching zone situated on the surface and having a smaller thickness than the predetermined thickness of the insulation layer;
- selectively etching the insulation layer in the first predetermined zone in accordance with the mask;
- forming a second mask on the semiconductor substrate and defining a second predetermined zone of the insulation layer;
- selectively implanting impurity ions into the second predetermined zone of the insulation layer, and selecting an implantation profile in accordance with an etching zone having the same thickness as the thickness of the insulation layer;
- selectively etching the insulation layer in the first predetermined zone and uncovering the semiconductor substrate;
- forming a whole-area conductive layer on the structure formed in the selectively etching;
- and
- polishing the conductive layer substantially to the thickness of the insulation layer.
Dependencies are inferred from the claim text.