Spacer process to eliminate corner transistor device

Abstract

A method for forming spacers for preventing formation of parasitic corner devices in transistors includes etching trenches into a semiconductor substrate to form an active area region, lining the trenches and the active area region with a first dielectric material and forming shallow trench isolation regions adjacent to the active area region by filling the trenches with a second dielectric material. The first dielectric material is removed from the active area region, and a gate oxide is formed over the active area region wherein divots form between the active area region and the shallow trench isolation regions. Dopants are implanted into the active area region to form a source and drain of the transistor. After the step of implanting, a spacer layer formed from a third dielectric material is deposited over the gate oxide layer to fill the divots. Anisotropically etching of the spacer layer forms spacers in the divots such that gate conductor material is prevented from entering the divots and the gate conductor material is spaced apart from corners of the active area region by the spacers to prevent the formation of the parasitic corner devices.

Dependencies are inferred from the claim text.