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US 6,207,482 B1Granted
Integration method for deep sub-micron dual gate transistor design
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJiaw-Ren Shih, Shui-Hung Chen, Jian-Hsing Lee, Chia-Hung Tunga
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Abstract
The invention provides a gate pocket implantation and post-processing sequence that allows for the creation of a deep and narrow pocket implant without affecting gate threshold voltage and the integrity of the gate oxide layer.
Claims25
A method of fabricating a CMOS device, on a semiconductor substrate, comprising the steps of:
- forming isolation regions in said substrate thereby creating active regions within said substrate;
- performing channel implantation in said active region;
- forming a polysilicon gate pattern within said active region, said gate structure to include a hard mask as an upper layer, then;
- performing a PMOS pocket implant, then;
- performing a NMOS pocket implant wherein said NMOS pocket implant uses Indium with an energy of 50 to 250 keV and a dose of 5e12 to 1e14 atoms/cm2, then;
- performing a NLDD implant, then;
- removing said hard mask layer thereby exposing said gate polysilicon, then;
- reoxidating said gate polysilicon, then;
- performing PLDD implant;
- performing a Rapid Thermal Anneal of said NLDD and PLDD regions;
- performing gate spacers;
- forming source/drain regions N+ implant;
- performing a Rapid Thermal Anneal of said source/drain regions N+ implant;
- performing source/drain regions P+ implant;
- and
- performing a Rapid Thermal Anneal of said source/drain regions P+ implant.
13 more elements
A method of fabricating a MOS device, on a semiconductor substrate, comprising the steps of:
- forming isolation regions in said semiconductor substrate thereby creating active regions within said substrate;
- performing channel implantation in said active regions;
- forming a polysilicon gate pattern within said active regions said gate pattern to include a hard mask or a photoresist mask as an upper level, then;
- performing a tilt angle pocket implant, then;
- performing a LDD implant, then;
- removing said hard mask or said photoresist mask layer thereby exposing said gate polysilicon, then;
- reoxidating said polysilicon, then;
- forming gate spacers;
- and
- performing source/drain implant.
7 more elements
Dependencies are inferred from the claim text.