Methods of packaging an integrated circuit and methods of forming an integrated circuit package
AssigneeVLSI Technology, Inc.
InventorsLily Zhao, Dexin Liang
Life of this patent
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AssigneeVLSI Technology, Inc.
InventorsLily Zhao, Dexin Liang
Estimating the term…
The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump. One method of packaging an integrated circuit includes providing a semiconductor die including a plurality of bond pads; providing a package substrate including a plurality of conductive bumps including plural power bumps and plural signal bumps; arranging individual signal bumps to be immediately adjacent at least one power bump; and electrically coupling the bond pads of the semiconductor die with respective conductive bumps.
A method of packaging an integrated circuit comprising:
A method of packaging an integrated circuit comprising:
A method of forming an integrated circuit package comprising:
A method of packaging an integrated circuit comprising:
Dependencies are inferred from the claim text.