Low temperature thin film transistor fabrication
AssigneeInternational Business Machines Corporation
InventorsAlessandro Cesare Callegari, Christos Dimitrios Dimitrakopoulos, Sampath Purushothaman
Life of this patent
Estimating the term…
Abstract
The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C. A TFT of the invention has a pentacene semiconductor layer in contact with a barium zirconate titanate gate oxide layer formed on a polycarbonate transparent substrate employing at least one of the techniques of sputtering, evaporation and laser ablation.
Claims10
In a process of fabricating a low temperature thin film transistor by serial deposition of at least a semiconductor layer in contact with a gate insulation layer, the improvement comprising in combination:
- providing a substrate of at least one material talen from the group of polycarbonate, polyethylene terephthalate, silicon, quartz and glass,
- depositing , by a process taken from the group of sputtering, spinning, evaporation and laser ablation at a substrate temperature in the range of about 25 to 150 degrees C.,
- a gate electrode on said substrate,
- said gate electrode being taken from the group of doped silicon, gold, silver, copper, aluminum, molybdenum, platinum and conducting polymers,
- an inorganic oxide gate insulation layer on said substrate and over said gate,
- said gate insulation being of at least one inorganic oxide taken from the group of inorganic oxides including Ta2O3, V2O3, Ti O2, the ferroelectric insulators Bi4Ti3O12, Ba Mg F4, Sr Ti O3, and the mixed oxides Sr Bi2Ta(1-x)Nb(x)O3, PbZr(x)Ti(1-x)O3, BaZr(x)Ti(1-x)O3, and Ba(x)Sr(1-x)TiO3,
- an organic semiconductor layer over said inorganic oxide gate insulation layer and,
- source and drain electrodes on said organic semiconductor layer overlapping said gate and separated by a channel distance,
- said source and drain electrodes being taken from the group of doped silicon, gold, silver, copper, aluminum, molybdenum, platinum and conducting polymers.
The process of fabricating a low temperature thin film transistor through serial deposition of layers on a substrate, comprising in combination the steps of:
- performing said deposition of layers in a temperature range of about 25 to 150 degrees C., and during said deposition,
- employing at least one room temperature deposition process taken from the group of sputter spinning, evaporation and laser ablation, and serially,
- depositing a gate electrode on said substrate,
- depositing an inorganic oxide gate insulation layer on said substrate and over said gate electrode, and,
- depositing an organic semiconductor layer on said gate insulation layer including a step of depositing source and drain electrodes separated by a channel distance.
Dependencies are inferred from the claim text.