Temperature control method of solder bumps in reflow furnace, and reflow furnace
AssigneeFujitsu Limited
InventorNobuyoshi Yamaoka
Life of this patent
Estimating the term…
Abstract
A method for determining the condition of a reflow furnace so as to prevent the semiconductor element from tilting due to different collapsed amounts of solder bumps in the single semiconductor element of multiple chip modules mounted on the semiconductor element on the substrate. For the carrying direction in the reflow furnace using a carrying belt, temperature analysis for time duration is performed for the solder bumps at both the front and rear, and then the condition of the reflow furnace is determined so as to close at both the times for reaching the solder melting temperature and the times for maintaining the solder melting temperature.
Claims8
A temperature control method for controlling the temperature of a solder bump in a reflow furnace used in mounting a semiconductor element, in which the semiconductor element is mounted on a substrate via solder bumps while moving the substrate into a reflow furnace, and in which the heat conductivity profile of the reflow furnace is set through temperature analysis, the method comprising the steps of:
- obtaining, via temperature analysis, temperatures in a forward side and in a rearward side of the movement of the solder bumps securing the semiconductor element, wherein the temperature gradient is analyzed and altered from the circumference of the semiconductor element to the center of the semiconductor element;
- obtaining, from the analyzed results, a thermal conductive coefficient which is one of the difference between the times at which the temperatures of the solder bumps at the forward and rearward sides exceeds the melting temperature of the solder is small, and the difference between the times at which the temperature of the solder bumps at the forward and rearward sides reaches the melting temperature of the solder is small;
- and
- controlling the temperature of the solder bumps by setting a heat conductivity profile within the reflow furnace based on the obtained thermal conductive coefficient.
A temperature control method for controlling the temperature of a solder bump in a reflow furnace used in mounting a semiconductor element, in which the semiconductor element is mounted on a substrate via solder bumps while moving the substrate into a reflow furnace, and in which a jig is selected through temperature analysis, the method comprising the steps of:
- obtaining, by temperature analysis, temperatures in a forward side and in a rearward side of the movement of the solder bumps securing the semiconductor element, wherein the shape and data of a characteristic value of the jig are analyzed and altered;
- obtaining, from the analyzed results, a jig which is one of the difference between the times of which the temperatures of the solder bumps at the forward and rearward sides exceeds the melting temperature of the solder is small, and the difference between the times of which the temperature of the solder bumps at the forward and rearward sides reaches the melting temperature of the solder is small;
- and
- controlling, using the obtained jig, a temperature of the solder bump in the reflow furnace.
Dependencies are inferred from the claim text.