Bus interface unit having multipurpose transaction buffer

A bus interface unit for use in a computer system of the type having a cache, a system bus, and a plurality of types of bus transactions, said bus interface unit comprising:

• a random-access transaction buffer that stores informational entries for bus transactions that are requested by the cache, each informational entry including address and data information;
• a first pointer queue coupled to the transaction buffer, the first pointer queue storing a pointer to the informational entry of each bus transaction stored in the transaction buffer that is of a first transaction type;
• and
• a second pointer queue coupled to the transaction buffer, the second pointer queue storing a pointer to the informational entry of each bus transaction stored in the transaction buffer that is of a second transaction type, which is different than the first transaction type,
• wherein the pointers stored in the first and second pointer queues are used to order the bus transactions stored in the transaction buffer.

A method of storing address, data, and ordering information for requested bus transactions in a computer system having a plurality of bus transaction types, said method comprising the steps of:

• storing the address and data information for requested bus transactions as entries in a random-access buffer;
• forming a pointer to each of the information entries stored in the random-access buffer;
• and
• storing the ordering information for the bus transactions by maintaining each of the formed pointers in one of a plurality of pointer buffers such that each of the pointer buffers stores pointers to the informational entries for requested bus transactions with transaction types that are a subset of all of the transaction types.