Digital multiply-accumulate circuit that can operate on both integer and floating point numbers simultaneously

A method of performing accumulation of products comprising the steps of:

• (a) using an exponent adder circuit to receive as input and add first and second exponents of first and second operands, respectively, to produce a control exponent sum, both said first and second operands being in a combined data format, said combined data format prescribing a mantissa and an exponent for both integer and floating point operands, said first and second operands having first and second mantissas, respectively;
• (b) before said adding by said exponent adder circuit, using said exponent adder circuit to monitor said first exponent and determine if said first operand is an integer, and in response to said first operand being an integer, substitute said first exponent in said adding by said exponent adder circuit with a substitute exponent, said substitute exponent being related to the number of bits of said first mantissa;
• (c) using a mantissa multiplier circuit to multiply said first mantissa and said second mantissa to produce a mantissa product;
• (d) using a shifter coupled to said exponent adder circuit and said mantissa multiplier circuit to shift said mantissa product according to said control exponent sum to produce a shifted number, said shifted number being in a pre-defined fixed point format.

A Multiply-Accumulate circuit comprising:

• (a) an exponent adder circuit having:
• a first multi-bit output;
• first and second multi-bit inputs for receiving as input first and second exponents of first and second operands, respectively, to be added by said exponent adder circuit using an exponent adder, said adding of said first exponent and said second exponent by said exponent adder producing a control exponent sum at said first multi-bit output, said first and second operands being both in a combined data format, said combined data format prescribing a mantissa and an exponent for both integer and floating point operands, said first and second operands having first and second mantissas, respectively;
• and
• a first detector-selector coupled to said first multi-bit input for monitoring said first exponent and determining if said first operand is an integer, and in response to said first operand being an integer, substituting said first exponent in said adding by said exponent adder with a substitute exponent, said substitute exponent being related to the number of bits of said first mantissa;
• (b) a mantissa multiplier circuit having third and fourth multi-bit inputs for receiving as input said first and second mantissas of said first and second operands, respectively, and a second multi-bit output, said mantissa multiplier circuit multiplying said first mantissa and said second mantissa to produce a mantissa product at said multi-bit output2;
• (c) a shifter having fifth and sixth multi-bit inputs, said fifth multi-bit input being connected to said first multi-bit output, said sixth multi-bit input being connected to said second multi-bit output, said shifter shifting said mantissa product according to said control exponent sum to produce a shifted number, said shifted number being in a pre-defined fixed point format.